Datasheet

OUT
OUT
FB
SS
GND
10
9
8
7
6
IN
IN
PG
BIAS
EN
1
2
3
4
5
Thermal
Pad
TPS74701
SBVS099F –NOVEMBER 2007–REVISED NOVEMBER 2010 www.ti.com
DEVICE INFORMATION
DRC PACKAGE
3mm × 3mm SON
(TOP VIEW)
PIN DESCRIPTIONS
TPS74701
NAME PIN # DESCRIPTION
IN 1, 2 Input to the device.
Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into
EN 5
shutdown mode. This pin must not be left unconnected.
SS 7 Soft-Start pin. A capacitor connected on this pin to ground sets the start-up time. If this pin is left
unconnected, the regulator output soft-start ramp time is typically 200ms.
BIAS 4 Bias input voltage for error amplifier, reference, and internal control circuits.
Power Good pin. An open-drain, active-high output that indicates the status of V
OUT
. When V
OUT
exceeds the PG trip threshold, the PG pin goes into a high-impedance state. When V
OUT
is
below this threshold the pin is driven to a low-impedance state. A pull-up resistor from 10kΩ to
PG 3
1MΩ should be connected from this pin to a supply of up to 5.5V. The supply can be higher than
the input voltage. Alternatively, the PG pin can be left unconnected if output monitoring is not
necessary.
Feedback pin. The feedback connection to the center tap of an external resistor divider network
FB 8
that sets the output voltage. This pin must not be left floating.
OUT 9, 10 Regulated output voltage. A small capacitor (total typical capacitance ≥ 2.2mF, ceramic) is
needed from this pin to ground to assure stability.
NC N/A No connection. This pin can be left floating or connected to GND to allow better thermal contact
to the top-side plane.
GND 6 Ground
Thermal Pad — Should be soldered to the ground plane for increased thermal performance.
6 Submit Documentation Feedback Copyright © 2007–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS74701