Datasheet

TPS744xx
SBVS066O –DECEMBER 2005–REVISED MARCH 2013 www.ti.com
ELECTRICAL CHARACTERISTICS
At V
EN
= 1.1V, V
IN
= V
OUT
+ 0.3V, C
IN
= C
BIAS
= 0.1μF, C
OUT
= 10μF, I
OUT
= 50mA, V
BIAS
= 5.0V, and T
J
= –40°C to +125°C,
unless otherwise noted. Typical values are at T
J
= +25°C.
TPS744xx
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IN
Input voltage range V
OUT
+ V
DO
5.5 V
V
BIAS
Bias pin voltage range 2.375 5.25 V
V
REF
Internal reference (Adj.) T
J
= +25°C 0.796 0.8 0.804 V
Output voltage range V
IN
= 5V, I
OUT
= 1.5A, V
BIAS
= 5V V
REF
3.6 V
V
OUT
2.97V ≤ V
BIAS
≤ 5.25V, V
OUT
+ 1.62V ≤ V
BIAS
,
Accuracy
(1)
–1 ±0.2 +1 %
50mA ≤ I
OUT
≤ 3.0A
V
OUT (NOM)
+ 0.3 ≤ V
IN
≤ 5.5V, QFN 0.0005 0.05
V
OUT
/V
IN
Line regulation %/V
V
OUT (NOM)
+ 0.3 ≤ V
IN
≤ 5.5V, DDPAK 0.0005 0.06
0mA ≤ I
OUT
≤ 50mA 0.013 %/mA
V
OUT
/I
OUT
Load regulation
50mA ≤ I
OUT
≤ 3.0A 0.03 %/A
I
OUT
= 3.0A, V
BIAS
– V
OUT (NOM)
≥ 1.62V, QFN 115 195
V
IN
dropout voltage
(2)
mV
V
DO
I
OUT
= 3.0A, V
BIAS
– V
OUT (NOM)
≥ 1.62V, DDPAK 120 240
V
BIAS
dropout voltage
(2)
I
OUT
= 3.0A, V
IN
= V
BIAS
1.62 V
V
OUT
= 80% × V
OUT (NOM)
, QFN 3.8 6.0
I
CL
Current limit A
V
OUT
= 80% × V
OUT (NOM)
, DDPAK 3.5 6.0
I
BIAS
Bias pin current I
OUT
= 0mA to 3.0A 2 4 mA
I
SHDN
Shutdown supply current (V
IN
) V
EN
≤ 0.4V 1 100 μA
I
FB
, I
SNS
Feedback, Sense pin current
(3)
I
OUT
= 50mA to 3.0A –250 95 250 nA
1kHz, I
OUT
= 1.5A, V
IN
= 1.8V, V
OUT
= 1.5V 73
Power-supply rejection
dB
800kHz, I
OUT
= 1.5A, V
IN
= 1.8V,
(V
IN
to V
OUT
)
42
V
OUT
= 1.5V
PSRR
(4)
1kHz, I
OUT
= 1.5A, V
IN
= 1.8V, V
OUT
= 1.5V 62
Power-supply rejection
dB
800kHz, I
OUT
= 1.5A, V
IN
= 1.8V,
(V
BIAS
to V
OUT
)
50
V
OUT
= 1.5V
100Hz to 100kHz, I
OUT
= 1.5A,
Noise Output noise voltage 16 × V
OUT
μV
RMS
C
SS
= 0.001μF
%V
OUT
droop during load
V
TRAN
I
OUT
= 100mA to 3.0A at 1A/μs, C
OUT
= 0μF 4 %V
OUT
transient
t
STR
Minimum startup time I
OUT
= 1.5A, C
SS
= open 100 μs
I
SS
Soft-start charging current V
SS
= 0.4V 0.5 0.73 1 μA
V
EN, HI
Enable input high level 1.1 5.5 V
V
EN, LO
Enable input low level 0 0.4 V
V
EN, HYS
Enable pin hysteresis 50 mV
V
EN, DG
Enable pin deglitch time 20 μs
I
EN
Enable pin current V
EN
= 5V 0.1 1 μA
V
IT
PG trip threshold V
OUT
decreasing 86.5 90 93.5 %V
OUT
V
HYS
PG trip hysteresis 3 %V
OUT
V
PG, LO
PG output low voltage I
PG
= 1mA (sinking), V
OUT
< V
IT
0.3 V
I
PG, LKG
PG leakage current V
PG
= 5.25V, V
OUT
> V
IT
0.03 1 μA
T
J
Operating junction temperature –40 +125 °C
Shutdown, temperature increasing +155
T
SD
Thermal shutdown temperature °C
Reset, temperature decreasing +140
(1) Adjustable devices tested at 0.8V; external resistor tolerance is not taken into account.
(2) Dropout is defined as the voltage from the input to V
OUT
when V
OUT
is 2% below nominal.
(3) I
FB
, I
SNS
current flow is out of the device.
(4) See Figure 12 to Figure 15 for PSRR at different conditions.
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