Datasheet

TPS74401
GND
EN
FB
IN PG
SS
OUT
V
IN
V
OUT
V
PG
R
1
R
2
R
3
C
OUT
Optional
C
IN
1 Fm
C
SS
V
BIAS
C
BIAS
1 Fm
V =0.8
OUT
´ 1+
R
1
R
2
(
)
BIAS
TPS744xx
GND
EN
SNS
IN PG
SS
OUT
V
IN
V
OUT
V
PG
R
3
C
OUT
Optional
C
IN
1 Fm
C
SS
V
BIAS
C
BIAS
1 Fm
BIAS
TPS744xx
www.ti.com SBVS066O –DECEMBER 2005–REVISED MARCH 2013
APPLICATION INFORMATION
The TPS744xx belongs to a family of new generation
FIXED VOLTAGE AND SENSE PIN
ultra-low dropout regulators that feature soft-start and
Figure 31 illustrates a typical application circuit for the
tracking capabilities. These regulators use a low
TPS744xx fixed output device.
current bias input to power all internal control
circuitry, allowing the NMOS pass transistor to
regulate very low input and output voltages.
The use of an NMOS-pass FET offers several critical
advantages for many applications. Unlike a PMOS
topology device, the output capacitor has little effect
on loop stability. This architecture allows the
TPS744xx to be stable with any or even no output
capacitor. Transient response is also superior to
PMOS topologies, particularly for low V
IN
applications.
Figure 31. Typical Application Circuit for the
TPS744xx (Fixed Voltage)
The TPS744xx features a programmable, voltage-
controlled soft-start circuit that provides a smooth,
monotonic start-up and limits startup inrush currents
A fixed voltage version of the TPS744xx has a sense
that may be caused by large capacitive loads. A
pin (SNS) so that the device can monitor its output
power-good (PG) output is available to allow supply
voltage at the load device pin(s) as closely as
monitoring and sequencing of other supplies. An
possible. Unlike other TI fixed-voltage LDOs,
enable (EN) pin with hysteresis and deglitch allows
however, this pin must not be left floating; it must be
slow-ramping signals to be used for sequencing the
connected to an output node. See the TI application
device. The low V
IN
and V
OUT
capability allows for
report, Ultimate Regulation of with Fixed Output
inexpensive, easy-to-design, and efficient linear
Versions of the TPS742xx, TPS743xx, and TPS744xx
regulation between the multiple supply voltages often
(literature number SBVA024), available for download
present in processor intensive systems.
from the TI web site.
ADJUSTABLE VOLTAGE PART AND
INPUT, OUTPUT, AND BIAS CAPACITOR
SETTING
REQUIREMENTS
Figure 30 illustrates a typical application circuit for the
The device does not require any output capacitor for
TPS74401 adjustable output device.
stability. If an output capacitor is needed, the device
is designed to be stable for all available types and
R
1
and R
2
can be calculated for any output voltage
values of output capacitance. The device is also
using the formula shown in Figure 30. Refer to
stable with multiple capacitors in parallel, of any type
Table 1 for sample resistor values of common output
or value.
voltages. In order to achieve the maximum accuracy
specifications, R
2
should be ≤ 4.99kΩ.
The capacitance required on the IN and BIAS pins
strongly depends on the input supply source
impedance. To counteract any inductance in the
input, the minimum recommended capacitor for V
IN
and V
BIAS
is 1μF. If V
IN
and V
BIAS
are connected to
the same supply, the recommended minimum
capacitor for V
BIAS
is 4.7μF. Good quality, low ESR
capacitors should be used on the input; ceramic X5R
and X7R capacitors are preferred. These capacitors
should be placed as close the pins as possible for
optimum performance.
Figure 30. Typical Application Circuit for the
TPS74401 (Adjustable Version)
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