Datasheet

TPS743xx
www.ti.com SBVS065K –DECEMBER 2005–REVISED AUGUST 2010
ENABLE/SHUTDOWN current during a short-circuit fault. Recovery from a
short-circuit condition is well-controlled and results in
The enable (EN) pin is active high and is compatible
very little output overshoot when the load is removed.
with standard digital signaling levels. V
EN
below 0.4V
See Figure 27 in the Typical Characteristics section
turns the regulator off, while V
EN
above 1.1V turns the
for output short-circuit recovery performance.
regulator on. Unlike many regulators, the enable
circuitry has hysteresis and deglitching for use with The internal current limit protection circuitry of the
relatively slow-ramping analog signals. This TPS743xx is designed to protect against overload
configuration allows the TPS743xx to be enabled by conditions. It is not intended to allow operation above
connecting the output of another supply to the EN the rated current of the device. Continuously running
pin. The enable circuitry typically has 50mV of the TPS743xx above the rated current degrades
hysteresis and a deglitch circuit to help avoid on-off device reliability.
cycling because of small glitches in the V
EN
signal.
THERMAL PROTECTION
The enable threshold is typically 0.8V and varies with
temperature and process variations. Temperature
Thermal protection disables the output when the
variation is approximately –1mV/°C; therefore,
junction temperature rises to approximately +155°C,
process variation accounts for most of the variation in
allowing the device to cool. When the junction
the enable threshold. If precise turn-on timing is
temperature cools to approximately +140°C, the
required, a fast rise-time signal should be used to
output circuitry is enabled. Depending on power
enable the TPS743xx.
dissipation, thermal resistance, and ambient
temperature the thermal protection circuit may cycle
If not used, EN can be connected to either IN or
on and off. This cycling limits the dissipation of the
BIAS. If EN is connected to IN, it should be
regulator, protecting it from damage as a result of
connected as close as possible to the largest
overheating.
capacitance on the input to prevent voltage droops on
that line from triggering the enable circuit.
Activation of the thermal protection circuit indicates
excessive power dissipation or inadequate
POWER-GOOD (QFN Package Only) heatsinking. For reliable operation, junction
temperature should be limited to +125°C maximum.
The power-good (PG) pin is an open-drain output and
To estimate the margin of safety in a complete design
can be connected to any 5.5V or lower rail through an
(including heatsink), increase the ambient
external pull-up resistor. This pin requires at least
temperature until thermal protection is triggered; use
1.1V on V
BIAS
in order to have a valid output. The PG
worst-case loads and signal conditions. For good
output is high-impedance when V
OUT
is greater than
reliability, thermal protection should trigger at least
V
IT
+ V
HYS
. If V
OUT
drops below V
IT
or if V
BIAS
drops
+30°C above the maximum expected ambient
below 1.9V, the open-drain output turns on and pulls
condition of the application. This condition produces a
the PG output low. The PG pin also asserts when the
worst-case junction temperature of +125°C at the
device is disabled. The recommended operating
highest expected ambient temperature and
condition of PG pin sink current is up to 1mA, so the
worst-case load.
pull-up resistor for PG should be in the range of 10kΩ
to 1MΩ. PG is only provided on the QFN package. If The internal protection circuitry of the TPS743xx is
output voltage monitoring is not needed, the PG pin designed to protect against overload conditions. It is
can be left floating. not intended to replace proper heatsinking.
Continuously running the TPS743xx into thermal
shutdown degrades device reliability.
INTERNAL CURRENT LIMIT
The TPS743xx features a factory-trimmed, accurate
current limit that is flat over temperature and supply
voltage. The current limit allows the device to supply
surges of up to 1.8A and maintain regulation. The
current limit responds in about 10ms to reduce the
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