Datasheet

TPS742xx
GND
EN
SNS
IN PG
BIAS
SS
OUT
V
IN
V
OUT
R
3
C
OUT
Optional
C
IN
1 Fm
C
SS
V
BIAS
C
BIAS
1 Fm
TPS74201
GND
EN
FB
IN PG
BIAS
SS
OUT
V
IN
V
OUT
R
1
R
2
R
3
C
OUT
Optional
C
IN
1 Fm
C
SS
V
BIAS
C
BIAS
1 Fm
V =0.8
OUT
´ 1+
R
1
R
2
(
)
TPS742xx
SBVS064L –DECEMBER 2005–REVISED NOVEMBER 2010 www.ti.com
APPLICATION INFORMATION
The TPS742xx belongs to a family of new generation
FIXED VOLTAGE AND SENSE PIN
ultra-low dropout regulators that feature soft-start and
tracking capabilities. These regulators use a low
Figure 29 illustrates a typical application circuit for the
current bias input to power all internal control
TPS742xx fixed output device.
circuitry, allowing the NMOS pass transistor to
regulate very low input and output voltages.
The use of an NMOS-pass FET offers several critical
advantages for many applications. Unlike a PMOS
topology device, the output capacitor has little effect
on loop stability. This architecture allows the
TPS742xx to be stable with any or even no output
capacitor. Transient response is also superior to
PMOS topologies, particularly for low V
IN
applications.
Figure 29. Typical Application Circuit for the
The TPS742xx features a programmable
TPS742xx (Fixed Voltage)
voltage-controlled soft-start circuit that provides a
smooth, monotonic start-up and limits startup inrush
A fixed voltage version of the TPS742xx has a sense
currents that may be caused by large capacitive
pin (SNS) so that the device can monitor its output
loads. A power-good (PG) output is available to allow
voltage at the load device pin(s) as closely as
supply monitoring and sequencing of other supplies.
possible. Unlike other TI fixed-voltage LDOs,
An enable (EN) pin with hysteresis and deglitch
however, this pin must not be left floating; it must be
allows slow-ramping signals to be used for
connected to an output node. See the TI application
sequencing the device. The low V
IN
and V
OUT
report, Ultimate Regulation of with Fixed Output
capability allows for inexpensive, easy-to-design, and
Versions of the TPS742xx, TPS743xx, and TPS744xx
efficient linear regulation between the multiple supply
(literature number SBVA024), available for download
voltages often present in processor intensive
from the TI web site.
systems.
INPUT, OUTPUT, AND BIAS CAPACITOR
ADJUSTABLE VOLTAGE PART AND
REQUIREMENTS
SETTING
The device does not require any output capacitor for
Figure 28 is a typical application circuit for the
stability. If an output capacitor is needed, the device
TPS74201 adjustable output device.
is designed to be stable for all available types and
values of output capacitance. The device is also
R
1
and R
2
can be calculated for any output voltage
stable with multiple capacitors in parallel, which can
using the formula shown in Figure 28. Refer to
be of any type or value.
Table 1 for sample resistor values of common output
voltages. In order to achieve the maximum accuracy
The capacitance required on the IN and BIAS pins is
specifications, R
2
should be ≤ 4.99kΩ.
strongly dependent on the input supply source
impedance. To counteract any inductance in the
input, the minimum recommended capacitor for V
IN
and V
BIAS
is 1mF. If V
IN
and V
BIAS
are connected to
the same supply, the recommended minimum
capacitor for V
BIAS
is 4.7mF. Good quality, low ESR
capacitors should be used on the input; ceramic X5R
and X7R capacitors are preferred. These capacitors
should be placed as close the pins as possible for
optimum performance.
Figure 28. Typical Application Circuit for the
TPS74201 (Adjustable Version)
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