Datasheet
R =
qJA
(+125 C T )° -
A
P
D
TPS740xx
SBVS091C –JUNE 2011– REVISED DECEMBER 2011
www.ti.com
LAYOUT RECOMMENDATIONS AND POWER DISSIPATION
An optimal layout can greatly improve transient performance, PSRR, and noise. To minimize the voltage drop on
the input of the device during load transients, the capacitance on IN and BIAS should be connected as close as
possible to the device. This capacitance also minimizes the effects of parasitic inductance and resistance of the
input source and can, therefore, improve stability. To achieve optimal transient performance and accuracy, the
top side of R
1
in Figure 31 should be connected as close as possible to the load. If BIAS is connected to IN, it is
recommended to connect BIAS as close to the sense point of the input supply as possible. This connection
minimizes the voltage drop on BIAS during transient conditions and can improve the turn-on response.
Knowing the device power dissipation and proper sizing of the thermal plane that is connected to the thermal pad
is critical to avoiding thermal shutdown and ensuring reliable operation. Power dissipation of the device depends
on input voltage and load conditions and can be calculated using Equation 1:
PD = (V
IN
– V
OUT
) × I
OUT
(1)
Power dissipation can be minimized and greater efficiency can be achieved by using the lowest possible input
voltage necessary to achieve the required output voltage regulation.
On the DGK (MSOP-8) package, the primary conduction path for heat is through four GND pins (right side of the
IC) to the printed circuit board (PCB). On the DPT (Jr S-PAK) package, the primary conduction path for heat is
through the tab to the PCB. This tab should be connected to ground. On both packages, ground pattern on PCB
should have an appropriate amount of copper PCB area to ensure the device does not overheat. The maximum
junction-to-ambient thermal resistance depends on the maximum ambient temperature, maximum device junction
temperature, and power dissipation of the device and can be calculated using Equation 2:
(2)
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