Datasheet

TPS740xx
www.ti.com SBVS091C –JUNE 2011– REVISED DECEMBER 2011
SEQUENCING REQUIREMENTS
V
IN
, V
BIAS
, and V
EN
can be sequenced in any order without causing damage to the device.
NOTE: When V
BIAS
and V
EN
are present and V
IN
is not supplied, this device outputs approximately 50 μA of
current from OUT. Although this condition does not cause any damage to the device, the output current may
charge up the OUT node if total resistance between OUT and GND (including external feedback resistors) is
greater than 10 kΩ.
ENABLE/SHUTDOWN (Fixed Voltage Version Only)
The enable (EN) pin is active high and is compatible with standard digital signaling levels. When V
EN
is below 0.4
V, it turns the regulator off; when V
EN
is above 1.1 V, it turns the regulator on. Unlike many regulators, the enable
circuitry has hysteresis and deglitching for use with relatively slow ramping analog signals. This configuration
allows the TPS740xx to be enabled by connecting the output of another supply to the EN pin. The enable
circuitry typically has 50 mV of hysteresis and a deglitch circuit to help avoid on/off cycling as a result of small
glitches in the V
EN
signal.
The enable threshold is typically 0.8 V and varies with temperature and process variations. Temperature
variation is approximately –1 mV/°C; process variation accounts for most of the rest of the variation to the 0.4 V
and 1.1 V limits. If precise turn-on timing is required, a fast rise-time signal must be used to enable the
TPS740xx.
If not used, EN can be connected to either IN or BIAS. If EN is connected to IN, it should be connected as close
as possible to the largest capacitance on the input to prevent voltage droops on that line from triggering the
enable circuit.
INTERNAL CURRENT LIMIT
The TPS740xx features a current limit that is flat over temperature and supply voltage. The current limit responds
in approximately 10μs to reduce the current during a short-circuit fault.
The internal current limit protection circuitry of the TPS740xx is designed to protect against overload conditions.
It is not intended to allow operation above the rated current of the device. Continuously running the TPS740xx
above the rated current degrades device reliability.
THERMAL PROTECTION
Thermal protection disables the output when the junction temperature rises to approximately +160°C, allowing
the device to cool. When the junction temperature cools to approximately +140°C, the output circuitry is enabled.
Depending on power dissipation, thermal resistance, and ambient temperature the thermal protection circuit may
cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of
overheating.
Activation of the thermal protection circuit indicates excessive power dissipation or inadequate heatsinking. For
reliable operation, junction temperature should be limited to +125°C maximum. To estimate the margin of safety
in a complete design (including heatsink), increase the ambient temperature until thermal protection is triggered;
use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least +40°C
above the maximum expected ambient condition of the application. This condition produces a worst-case junction
temperature of +125°C at the highest expected ambient temperature and worst-case load.
The internal protection circuitry of the TPS740xx is designed to protect against overload conditions. It is not
intended to replace proper heatsinking. Continuously running the TPS740xx into thermal shutdown degrades
device reliability.
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