Datasheet

Reference
SimplifiedBlock Diagram
V
OUT
OUT
BIAS
FB
IN
V =5V 5%
BIAS
±
V =1.8V
V =1.5V
I =1.5A
Efficiency=83%
IN
OUT
OUT
C
OUT
Reference
SimplifiedBlock Diagram
V
OUT
OUT
BIAS
FB
IN
V
IN
V =3.3V 5%
BIAS
±
V =3.3V 5V
V =1.5V
I =1.5A
Efficiency=45%
IN
OUT
OUT
±
C
OUT
TPS740xx
SBVS091C –JUNE 2011– REVISED DECEMBER 2011 www.ti.com
DROPOUT VOLTAGE
The TPS740xx offers very low dropout performance, making it well-suited for high-current, low V
IN
/low V
OUT
applications. The low dropout of the TPS740xx allows the device to be used in place of a dc/dc converter and
still achieve good efficiency. This performance provides designers with the power architecture for the application
to achieve the smallest, simplest, and lowest cost solution.
There are two different specifications for dropout voltage with the TPS740xx. The first specification (shown in
Figure 33) is referred to as V
IN
Dropout and is used when an external bias voltage is applied to achieve low
dropout. This specification assumes that V
BIAS
is at least 2.0 V above V
OUT
. If V
BIAS
is higher than V
OUT
+ 2.0 V,
V
IN
dropout is less than specified.
Figure 33. Typical Application of the TPS74001 Using an Auxiliary Bias Rail
The second specification (shown in Figure 34) is referred to as V
BIAS
Dropout and applies to applications where
IN and BIAS are tied together. This option allows the device to be used in applications where an auxiliary bias
voltage is not available or low dropout is not required. Dropout is limited by BIAS in these applications because
V
BIAS
provides the gate drive to the pass FET; therefore, V
BIAS
must be 2.0 V above V
OUT
. Because of this usage,
when IN and BIAS are tied together they easily consume large amounts of power. Do not to exceed the power
rating of the IC package.
Figure 34. Typical Application of the TPS74001 Without an Auxiliary Bias Rail
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Product Folder Link(s): TPS740xx