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5 Board Layout
This section provides the TPS740xxDPTEVM-713 board layout and illustrations.
NOTE: Board layouts are not to scale. These figures are intended to show how the board is laid
out; they are not intended to be used for manufacturing TPS740xxDPTEVM-713 PCBs.
Figure 5. Silkscreen Layer
Figure 6. Assembly Layer
7
SLVU476– June 2011 TPS740xxDPTEVM-713 Evaluation Module
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