Datasheet

Reverse Current
Power Dissipation
Thermal Protection
P
D
+ (V
IN
* V
OUT
) I
OUT
(6)
Package Mounting
TPS73601-EP , TPS73615-EP , TPS73618-EP
TPS73625-EP , TPS73630-EP , TPS73632-EP , TPS73633-EP
SGLS326C – APRIL 2006 – REVISED FEBRUARY 2009 .................................................................................................................................................. www.ti.com
35 ° C above the maximum expected ambient
condition of the application. This produces a
The NMOS pass element of the TPS736xx provides
worst-case junction temperature of 125 ° C at the
inherent protection against current flow from the
highest expected ambient temperature and
output of the regulator to the input when the gate of
worst-case load.
the pass device is pulled low. To ensure that all
charge is removed from the gate of the pass element, The internal protection circuitry of the TPS736xx has
EN must be driven low before the input voltage is been designed to protect against overload conditions.
removed. If this is not done, the pass element may be It was not intended to replace proper heatsinking.
left on due to stored charge on the gate. Continuously running the TPS736xx into thermal
shutdown degrades reliability.
After EN is driven low, no bias voltage is needed on
any pin for reverse current blocking. Note that
reverse current is specified as the current flowing out
of the IN pin due to voltage applied on the OUT pin.
The ability to remove heat from the die is different for
There is additional current flowing into the OUT pin
each package type, presenting different
due to the 80-k Ω internal resistor divider to ground
considerations in the PCB layout. The PCB area
(see Figure 2 and Figure 3 ).
around the device that is free of other components
moves the heat from the device to the ambient air.
For the TPS73601, reverse current may flow when
Performance data for JEDEC low- and high-K boards
V
FB
is more than 1 V above V
IN
.
are shown in the Power Dissipation Ratings table.
Using heavier copper increases the effectiveness in
removing heat from the device. The addition of plated
through-holes to heat-dissipating layers also
Thermal protection disables the output when the
improves the heatsink effectiveness.
junction temperature rises to approximately 160 ° C,
allowing the device to cool. When the junction
Power dissipation depends on input voltage and load
temperature cools to approximately 140 ° C, the output
conditions. Power dissipation is equal to the product
circuitry is again enabled. Depending on power
of the output current times the voltage drop across
dissipation, thermal resistance, and ambient
the output pass element (V
IN
to V
OUT
):
temperature, the thermal protection circuit may cycle
on and off. This limits the dissipation of the regulator,
protecting it from damage due to overheating.
Power dissipation can be minimized by using the
lowest-possible input voltage necessary to ensure the
Any tendency to activate the thermal protection circuit
required output voltage.
indicates excessive power dissipation or an
inadequate heatsink. For reliable operation, junction
temperature should be limited to 125 ° C maximum. To
estimate the margin of safety in a complete design
Solder-pad footprint recommendations for the
(including heatsink), increase the ambient
TPS736xx are presented in application bulletin Solder
temperature until the thermal protection is triggered;
Pad Recommendations for Surface-Mount Devices
use worst-case loads and signal conditions. For good
(AB-132), available from the TI web site at
reliability, thermal protection should trigger at least
www.ti.com .
14 Submit Documentation Feedback Copyright © 2006 – 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS73601-EP TPS73615-EP TPS73618-EP TPS73625-EP TPS73630-EP TPS73632-EP
TPS73633-EP