Datasheet

TPS735xx

SBVS087K –JUNE 2008–REVISED AUGUST 2013

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PIN DESCRIPTIONS

TPS735xx

NAME DRV DRB DESCRIPTION

IN 6 8 Input supply.

GND 3, Pad 4 Ground. The pad must be tied to GND.

Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into

EN 4 5

shutdown mode. EN can be connected to IN if not used.

Fixed voltage versions only; connecting an external capacitor to this pin bypasses noise

NR 2 3

generated by the internal bandgap. This allows output noise to be reduced to very low levels.

Adjustable version only; this is the input to the control loop error amplifier, and is used to set the

FB 2 3

output voltage of the device.

Output of the regulator. A small capacitor (total typical capacitance ≥ 2.0μF ceramic) is needed

OUT 1 1

from this pin to ground to assure stability.

N/C 5 2, 6, 7 Not internally connected. This pin must either be left open, or tied to GND.