Datasheet

TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F – JUNE 1995 – REVISED JANUARY 1999
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7333Q electrical characteristics at I
O
= 10 mA, V
I
= 4.3 V, EN = 0 V, C
o
= 4.7 µF (CSR
†
= 1 Ω),
SENSE shorted to OUT (unless otherwise noted)
PARAMETER
TEST CONDITIONS
‡
T
J
MIN TYP MAX
UNIT
Out
p
ut voltage
25°C 3.3
V
O
u
tp
u
t
v
oltage
4.3 V ≤ V
I
≤ 10 V, 5 mA ≤ I
O
≤ 500 mA –40°C to 125°C 3.23 3.37
V
I
O
=10mA
V
I
= 3 23 V
25°C 4.5 7
I
O
=
10
mA
,
V
I
=
3
.
23
V
–40°C to 125°C 8
Dropout voltage
I
O
= 100 mA
V
I
= 3 23 V
25°C 44 60
mV
D
ropou
t
vo
lt
age
I
O
=
100
mA
,
V
I
=
3
.
23
V
–40°C to 125°C 80
mV
I
O
= 500 mA
V
I
= 3 23 V
25°C 235 300
I
O
=
500
mA
,
V
I
=
3
.
23
V
–40°C to 125°C 400
Pass element series resistance
(3.23 V – V
O
)/I
O
, V
I
= 3.23 V,
25°C 0.44 0.6
Ω
Pass
-
element
series
resistance
(
O
)
O
,
I
O
= 500 mA
I
,
–40°C to 125°C 0.8
Ω
In
p
ut regulation
V
I
=43Vto10V
50 µA ≤ I
O
≤ 500 mA
25°C 6 23
mV
Inp
u
t
reg
u
lation
V
I
=
4
.
3
V
to
10
V
,
50
µ
A
≤
I
O
≤
500
mA
–40°C to 125°C 29
mV
I
O
=5mAto500mA 43V≤ V
I
≤ 10 V
25°C 21 38
mV
Out
p
ut regulation
I
O
=
5
mA
to
500
mA
,
4
.
3
V
≤
V
I
≤
10
V
–40°C to 125°C 75
mV
O
u
tp
u
t
reg
u
lation
I
O
=50µA to 500 mA 4 3 V ≤ V
I
≤ 10 V
25°C 31 60
mV
I
O
=
50
µ
A
to
500
mA
,
4
.
3
V
≤
V
I
≤
10
V
–40°C to 125°C 120
mV
I
O
=50µA
25°C 43 51
Ri
pp
le rejection
f = 120 Hz
I
O
=
50
µ
A
–40°C to 125°C 40
dB
Ripple
rejection
f
=
120
H
z
I
O
= 500 mA
25°C 39 49
dB
I
O
=
500
mA
–40°C to 125°C 36
Output noise-spectral density f = 120 Hz 25°C 2
µV/√Hz
C
o
= 4.7 µF
25°C 274
Output noise voltage 10 Hz ≤ f ≤ 100 kHz
C
o
= 10 µF
25°C 228
µVrms
C
o
= 100 µF
25°C 159
RESET trip-threshold voltage
V
O
decreasing –40°C to 125°C 2.868 V
RESET hysteresis voltage
25°C 18 mV
RESET out
p
ut low voltage
V
I
=28V
I
O(RESET)
=1mA
25°C 0.17 0.4
V
RESET
output
low
voltage
V
I
=
2
.
8
V
,
I
O(RESET)
= –
1
mA
–40°C to 125°C 0.4
V
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
o
.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.