Datasheet

TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F – JUNE 1995 – REVISED JANUARY 1999
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 36
0.1
0.01
0 50 100 150 200 250
TYPICAL REGIONS OF STABILITY
COMPENSATION SERIES RESISTANCE (CSR)
†
vs
OUTPUT CURRENT
10
100
I
O
– Output Current – mA
1
Region of Instability
T
A
= 25°C
V
I
= V
O
+ 1 V
C
o
= 10 µF
No Added Ceramic Capacitance
No Input Capacitor Added
Region of Instability
CSR – Compensation Series Resistance – Ω
Figure 37
0.1
0.01
0 0.1 0.2 0.3 0.4 0.5
TYPICAL REGIONS OF STABILITY
COMPENSATION SERIES RESISTANCE (CSR)
†
vs
ADDED CERAMIC CAPACITANCE
10
100
Added Ceramic Capacitance – µF
1
0.6 0.7 0.8 0.9 1
Region of Instability
T
A
= 25°C
V
I
= V
O
+ 1 V
I
O
= 500 mA
C
o
= 10 µF
No Input Capacitor Added
Region of
Instability
CSR – Compensation Series Resistance – Ω
Figure 38
0.4
0.3
0.2
0.1
2457
– Pass-Element Resistance –
0.5
PASS-ELEMENT RESISTANCE
vs
INPUT VOLTAGE
0.6
910
368
T
A
= 25°C
V
I(FB)
= 1.12 V
r
DS(on)
Ω
V
I
– Input Voltage – V
1
0.9
0.8
0.7
1.1
I
O
= 500 mA
I
O
= 100 mA
Figure 39
1.08
1.07
1.06
1.05
– Minimum Input Voltage For Valid RESET – V
1.09
MINIMUM INPUT VOLTAGE FOR VALID RESET
vs
FREE-AIR TEMPERATURE
1.1
–50 –25 0 25 50 75 100 125
V
I
T
A
– Free-Air Temperature – °C