Datasheet

P =(V V ) I-
D IN OUT OUT
´
TPS727xx
www.ti.com
SBVS128C JUNE 2009REVISED JANUARY 2011
DROPOUT VOLTAGE (including heatsink), increase the ambient
temperature until the thermal protection is triggered;
The TPS727xx uses a PMOS pass transistor to
use worst-case loads and signal conditions. For good
achieve low dropout. When (V
IN
V
OUT
) is less than
reliability, thermal protection should trigger at least
the dropout voltage (V
DO
), the PMOS pass device is
+35°C above the maximum expected ambient
in the linear region of operation and the
condition of your particular application. This
input-to-output resistance is the R
DS(ON)
of the PMOS
configuration produces a worst-case junction
pass element. V
DO
approximately scales with output
temperature of +125°C at the highest expected
current because the PMOS device behaves like a
ambient temperature and worst-case load.
resistor in dropout.
The internal protection circuitry of the TPS727xx has
As with any linear regulator, PSRR and transient
been designed to protect against overload conditions.
response are degraded as (V
IN
V
OUT
) approaches
It is not intended to replace proper heatsinking.
dropout. This effect is shown in Figure 16 in the
Continuously running the TPS727xx into thermal
Typical Characteristics section.
shutdown degrades device reliability.
TRANSIENT RESPONSE
Power Dissipation
As with any regulator, increasing the size of the
The ability to remove heat from the die is different for
output capacitor reduces over/undershoot magnitude
each package type, presenting different
but increases duration of the transient response.
considerations in the printed circuit board (PCB)
layout. The PCB area around the device that is free
UNDERVOLTAGE LOCK-OUT (UVLO)
of other components moves the heat from the device
to the ambient air. Performance data for JEDEC low-
The TPS727xx uses an undervoltage lock-out circuit
and high-K boards are given in the Dissipation
that keeps the output shut off until the input voltage
Ratings table. Using heavier copper increases the
reaches the UVLO threshold voltage.
effectiveness in removing heat from the device. The
addition of plated through-holes to heat-dissipating
THERMAL INFORMATION
layers also improves the heatsink effectiveness.
Thermal Protection
Power dissipation depends on input voltage and load
conditions. Power dissipation (P
D
) is equal to the
Thermal protection disables the output when the
product of the output current times the voltage drop
junction temperature rises to approximately +160°C,
across the output pass element (V
IN
to V
OUT
), as
allowing the device to cool. When the junction
shown in Equation 2:
temperature cools to approximately +140°C the
output circuitry is again enabled. Depending on power
(2)
dissipation, thermal resistance, and ambient
temperature, the thermal protection circuit may cycle
Package Mounting
on and off. This cycling limits the dissipation of the
Solder pad footprint recommendations for the
regulator, protecting it from damage as a result of
TPS727xx are available from the Texas Instruments
overheating.
web site at www.ti.com.
Any tendency to activate the thermal protection circuit
The recommended land pattern for the DSE package
indicates excessive power dissipation or an
is shown in Figure 26. Figure 27 shows the
inadequate heatsink. For reliable operation, junction
dimensions of the YFF package.
temperature should be limited to +125°C maximum.
To estimate the margin of safety in a complete design
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