Datasheet

THERMAL INFORMATION POWER DISSIPATION
PACKAGE MOUNTING
N TES:O
1,362
1,302
1.All lineardimen eters.sionsareinmillim
2.This drawingissub outnotice.jecttochangewith
0,994
0,934
TPS720xx
www.ti.com
........................................................................................................................................................ SBVS100D JUNE 2008 REVISED AUGUST 2009
Thermal protection disables the output when the The ability to remove heat from the die is different for
junction temperature rises to approximately +160 ° C, each package type, presenting different
allowing the device to cool. When the junction considerations in the printed circuit board (PCB)
temperature cools to approximately +140 ° C, the layout. The PCB area around the device that is free
output circuitry is again enabled. Depending on power of other components moves the heat from the device
dissipation, thermal resistance, and ambient to the ambient air. Performance data for JEDEC low-
temperature, the thermal protection circuit may cycle and high-K boards are given in the Dissipation
on and off. This cycling limits the dissipation of the Ratings table. Using heavier copper increases the
regulator, protecting it from damage as a result of effectiveness in removing heat from the device. The
overheating. addition of plated through-holes to heat-dissipating
layers also improves the heatsink effectiveness.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an Power dissipation depends on input voltage and load
inadequate heatsink. For reliable operation, junction conditions. Power dissipation (P
D
) is equal to the
temperature should be limited to +125 ° C maximum. product of the output current times the voltage drop
To estimate the margin of safety in a complete design across the output pass element (V
IN
to V
OUT
), as
(including heatsink), increase the ambient shown in Equation 2 :
temperature until the thermal protection is triggered;
P
D
= (V
IN
V
OUT
) × I
OUT
(2)
use worst-case loads and signal conditions. For good
reliability, thermal protection should trigger at least
+35 ° C above the maximum expected ambient
condition of the particular application. This
Solder pad footprint recommendations for the
configuration produces a worst-case junction
TPS720xx are available from the Texas Instruments
temperature of +125 ° C at the highest expected
web site at www.ti.com .
ambient temperature and worst-case load.
The internal protection circuitry of the TPS720xx has
been designed to protect against overload conditions.
It was not intended to replace proper heatsinking.
Continuously running the TPS720xx into thermal
shutdown degrades device reliability.
Figure 28. YZU Wafer Chip-Scale Package Dimensions (in mm)
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