Datasheet

TPS715Axx
SBVS047F –MAY 2004–REVISED OCTOBER 2012 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS
(1)
PRODUCT V
OUT
(2)
XX is nominal output voltage (for example 33 = 3.3V, 01 = Adjustable)
TPS715Axxyyz YY is Package Designator
Z is Package Quantity
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
(2) Custom output voltages from 1.25V to 5.4V in 50mV increments are available on a quick-turn basis for prototyping. Production quantities
are available; minimum package order quantities apply. Contact factory for details and availability.
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range, unless otherwise noted.
(1)
TPS715Axx UNIT
V
IN
range –0.3 to +24 V
Peak output current Internally limited
ESD rating, HBM 2 kV
ESD rating, CDM 500 V
Continuous total power dissipation See Power Dissipation Rating table
Junction temperature range, T
J
–40 to +150 °C
Storage temperature range –65 to +150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
POWER DISSIPATION RATING TABLE
DERATING FACTOR T
A
≤ 25°C POWER T
A
= +70°C POWER T
A
= +85°C POWER
BOARD PACKAGE R
θJA
°C/W
ABOVE T
A
= +25°C RATING RATING RATING
High-K
(1)
DRB 40 25.0mW/°C 2.50W 1.38W 1.00W
High-K
(1)
DRV 65 15.4mW/°C 1.54W 0.85W 0.62W
(1) The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch × 3 inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
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Product Folder Links: TPS715Axx