Datasheet

TPS7101Q, TPS7133Q, TPS7148Q, TPS7150Q
TPS7101Y, TPS7133Y, TPS7148Y, TPS7150Y
LOW-DROPOUT VOLTAGE REGULATORS
SLVS092G – NOVEMBER 1994 – REVISED JANUARY 2003
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7148 electrical characteristics at I
O
= 10 mA, V
I
= 5.85 V, EN = 0 V, C
O
= 4.7 µF/CSR
†
= 1 Ω, SENSE
shorted to OUT (unless otherwise noted)
PARAMETER
TEST CONDITIONS
‡
T
J
TPS7148Q
UNIT
PARAMETER
TEST
CONDITIONS
‡
T
J
MIN TYP MAX
UNIT
Out
p
ut voltage
V
I
= 5.85 V, I
O
= 10 mA 25°C 4.85
V
Output
voltage
5.85 V ≤ V
I
≤ 10 V, 5 mA ≤ I
O
≤ 500 mA –40°C to 125°C 4.75 4.95
V
I
O
=10mA
V
I
= 4 75 V
25°C 2.9 6
I
O
=
10
mA
,
V
I
=
4
.
75
V
–40°C to 125°C 8
Dropout voltage
I
O
= 100 mA
V
I
= 4 75 V
25°C 30 37
mV
D
ropou
t
vo
lt
age
I
O
=
100
mA
,
V
I
=
4
.
75
V
–40°C to 125°C 54
mV
I
O
= 500 mA
V
I
= 4 75 V
25°C 150 180
I
O
=
500
mA
,
V
I
=
4
.
75
V
–40°C to 125°C 250
Pass element series resistance
(4.75 V – V
O
)/I
O
, V
I
= 4.75 V,
25°C 0.32 0.35
Ω
Pass
-
element
series
resistance
(
O
)
O
,
I
O
= 500 mA
I
,
–40°C to 125°C 0.52
Ω
In
p
ut regulation
V
I
=585Vto10V
50 µA ≤ I
O
≤ 500 mA
25°C 27
mV
Input
regulation
V
I
=
5
.
85
V
to
10
V
,
50
µ
A
≤
I
O
≤
500
mA
–40°C to 125°C 37
mV
I
O
=5mAto500mA
585V≤ V
I
≤ 10 V
25°C 12 42
mV
Out
p
ut regulation
I
O
=
5
mA
to
500
mA
,
5
.
85
V
≤
V
I
≤
10
V
–40°C to 125°C 80
mV
Output
regulation
I
O
=50µA to 500 mA
585V≤ V
I
≤ 10 V
25°C 42 60
mV
I
O
=
50
µ
A
to
500
mA
,
5
.
85
V
≤
V
I
≤
10
V
–40°C to 125°C 130
mV
I
O
=50µA
25°C 42 53
Ri
pp
le rejection
f = 120 Hz
I
O
=
50
µ
A
–40°C to 125°C 39
dB
Ripple
rejection
f
=
120
Hz
I
O
= 500 mA
25°C 39 50
dB
I
O
=
500
mA
–40°C to 125°C 35
Output noise-spectral density f = 120 Hz 25°C 2 µV/√Hz
10 H ≤ f ≤ 100 kH
C
O
= 4.7 µF
25°C 410
Output noise voltage
10 Hz ≤ f ≤ 100 kHz,
CSR
†
=
1 Ω
C
O
= 10 µF
25°C 328
µVrms
CSR
†
=
1
Ω
C
O
= 100 µF
25°C 212
PG trip-threshold voltage
V
O
voltage decreasing from above V
PG
–40°C to 125°C 4.5 4.7 V
PG hysteresis voltage
25°C 50 mV
PG output low voltage
I
PG
=12mA
V
I
= 4 12 V
25°C 0.2 0.4
V
PG
ou
t
pu
t
l
ow vo
lt
age
I
PG
=
1
.
2
mA
,
V
I
=
4
.
12
V
–40°C to 125°C 0.4
V
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
O
.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.