Datasheet

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4 Board Layout
4.1 Layout
Texas Instruments
TPS712xxEVM−050
TPS713xxEVM−050
HPA050 Rev A
J1
J2
ON EN1 OFF ON EN2 OFF GND
GND
GND
GND
VOUT1
VOUT2
GND
VOUT1
VOUT2
R2
R6
J3
J4
J12
J13
J10
J11
J6
J5
RESET
ON EN1 OFF ON EN2 OFF GND RESET
VIN
GND
C1
R1
R3
R5
R4
C4
2005
C6
C5
U1
1
C3
C2
JP1 JP2 J7
J8
VIN
U2
1
C8
C7
C11
R9
R8
C9
C10
R10
R7
GND
JP3 JP4 J14
J9
Board Layout
This section provides the TPS712xxEVM-050 board layout and illustrations.
Note:
Board layouts are not to scale. These figures are intended to show how the board is laid
out; they are not intended to be used for manufacturing TPS712xxEVM PCBs.
Board layout is critical for best PSRR and output accuracy. Figure 1 , Figure 2 , and Figure 3 show the
board layout for the TPS712xxEVM-050 PCB. Careful attention has been given to the placement of input,
output, and noise reduction capacitors. For best accuracy with adjustable devices, the feedback point
should be connected at the load.
Figure 1. Assembly Layer
TPS712xxEVM User's GuideSBVU010 – February 2005 3