Datasheet

P
D
+ (V
IN
* V
OUT
) I
OUT
TPS71202, TPS71219
TPS71229, TPS71247
TPS71256, TPS71257
www.ti.com SBVS049D –MAY 2004–REVISED AUGUST 2010
TRANSIENT RESPONSE enabled. Depending on power dissipation, thermal
resistance, and ambient temperature, the thermal
As with any regulator, increasing the size of the
protection circuit may cycle on and off. This limits the
output capacitor will reduce over/undershoot
dissipation of the regulator, protecting it from damage
magnitude but increase duration of the transient
due to overheating.
response. In the adjustable version, the addition of a
capacitor, C
FB
, from the output to the feedback pin Any tendency to activate the thermal protection circuit
will also improve stability and transient response. The indicates excessive power dissipation or an
transient response of the TPS712xx is enhanced with inadequate heatsink. For reliable operation, junction
an active pull-down that engages when the output is temperature should be limited to +125°C maximum.
over-voltaged. The active pull-down decreases the To estimate the margin of safety in a complete design
output recovery time when the load is removed. (including heatsink), increase the ambient
Figure 13 in the Typical Characteristics section shows temperature until the thermal protection is triggered;
the output transient response. use worst-case loads and signal conditions. For good
reliability, thermal protection should trigger at least
+35°C above the maximum expected ambient
SHUTDOWN
condition of your application. This produces a
Both enable pins are active high and are compatible
worst-case junction temperature of +125°C at the
with standard TTL-CMOS levels. The device is only
highest expected ambient temperature and
completely disabled when both EN1 and EN2 are
worst-case load.
logic low. In this state, the LDO is completely off and
The internal protection circuitry of the TPS712xx was
the ground pin current drops to approximately 100
designed to protect against overload conditions. It
nA. With one output disabled, the ground pin current
was not intended to replace proper heatsinking.
is slightly greater than half the nominal value. When
Continuously running the TPS712xx into thermal
shutdown capability is not required, the enable pins
shutdown will degrade device reliability.
should be connected to the input supply.
POWER DISSIPATION
INTERNAL CURRENT LIMIT
The ability to remove heat from the die is different for
The TPS712xx internal current limit helps protect the
each package type, presenting different
regulator during fault conditions. During current limit,
considerations in the PCB layout. The PCB area
the output will source a fixed amount of current that is
around the device that is free of other components
largely independent of the output voltage.
moves the heat from the device to the ambient air.
The TPS712xx PMOS-pass transistors have a built-in
Performance data for a JEDEC high-K board is
back diode that conducts reverse current when the
shown in the Dissipation Ratings table. Using heavier
input voltage drops below the output voltage (that is,
copper will increase the effectiveness in removing
during power-down). Current is conducted from the
heat from the device. The addition of plated
output to the input and is not internally limited. If
through-holes to heat-dissipating layers will also
extended reverse voltage operation is anticipated,
improve the heat-sink effectiveness.
external limiting may be appropriate.
Power dissipation depends on input voltage and load
conditions. Power dissipation (P
D
) is equal to the
THERMAL PROTECTION
product of the output current times the voltage drop
Thermal protection disables both outputs when the
across the output pass element (V
IN
to V
OUT
):
junction temperature of either channel rises to
(4)
approximately +160°C, allowing the device to cool.
When the junction temperature cools to
Power dissipation can be minimized by using the
approximately +140°C, the output circuitry is again
lowest possible input voltage necessary to assure the
required output voltage.
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