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TPS71025

LOW-DROPOUT VOLTAGE REGULATOR

SLVS162A – MAY 1997 – REVISED MAY 1998

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2.5-V Fixed-Output Regulator

Very Low-Dropout (LDO) Voltage . . . 57 mV

Typical at I

= 100 mA

Very Low Quiescent Current, Independent

of Load...292 µA Typ

Extremely Low Sleep-State Current,

0.5 µA Max

2% Tolerance Over Specified Conditions

Output Current Range...0 mA to 500 mA

Available in Space Saving 8-Pin SOIC and

20-Pin TSSOP Packages

0°C to 125°C Operating Junction

Temperature Range

description

The TPS71025 low-dropout regulator offers an

order of magnitude reduction in both dropout

voltage and quiescent current over conventional

LDO performance. The improvement results from

replacing the typical pnp pass transistor with a

PMOS device.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (maximum of 95 mV

at an output current of 100 mA) and is directly proportional to the output current (see Figure 1). Additionally,

since the PMOS pass element is a voltage-driven device, the quiescent current is very low and remains

independent of output loading (typically 292 µA over the full range of output current, 0 mA to 500 mA). These

two key specifications yield a significant improvement in operating life for battery-powered systems. The

TPS71025 also features a sleep mode; applying a TTL high signal to EN

(enable) shuts down the regulator,

reducing the quiescent current to 0.5 µA maximum at T

= 25°C.

AVAILABLE OPTIONS

OUTPUT VOLTAGE

(V)

PACKAGED DEVICES

CHIP FORM

MIN TYP MAX

SMALL OUTLINE

(D)

PLASTIC DIP

(P)

TSSOP

(PW)

(Y)

0°C to 125°C 2.45 2.5 2.55 TPS71025D TPS71025P TPS71025PWLE TPS71025Y

The D package is availabe taped and reeled. Add R suffix to device type (e.g., TPS71025DR). The PW package is only available left-end taped

and reeled and is indicated by the LE suffix on the device type.

NC – No internal connection

GND

SENSE

OUT

D OR P PACKAGE

(TOP VIEW)

GND

SENSE

OUT

PW PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (23 pages)

PAGE 1
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 D D D D D D D D D OR P PACKAGE (TOP VIEW) 2.5-V Fixed-Output Regulator Very Low-Dropout (LDO) Voltage . . . 57 mV Typical at IO = 100 mA Very Low Quiescent Current, Independent of Load . . . 292 µA Typ Extremely Low Sleep-State Current, 0.5 µA Max 2% Tolerance Over Specified Conditions Output Current Range . . .
PAGE 2
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 0.5 TA = 25°C Dropout Voltage – V 0.4 0.3 0.2 0.1 0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 IO – Output Current – A Figure 1. Dropout Voltage Versus Output Current functional block diagram IN † † EN _ + OUT Vref = 1.182 V SENSE 260 kΩ 233 kΩ GND † Switch positions are shown with EN low (active).
PAGE 3
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 Terminal Functions TERMINAL NAME DESCRIPTION NO. D or P PW EN 2 6 GND 1 1–3 Ground IN 3, 4 8–10 Input supply voltage OUT 5, 6 13, 14 Output voltage 7 15 SENSE Enable input. Logic low enables output Output voltage sense input TPS71025Y chip information These chips, when properly assembled, display characteristics similar to those of the TPS71025.
PAGE 4
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Input voltage range, VI, EN (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 11 V Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 5
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 electrical characteristics over recommended operating junction temperature range, VI(IN) = 3.5 V, IO = 10 mA, EN = 0 V, Co = 4.7 µF/CSR† = 1 Ω, SENSE shorted to OUT (unless otherwise noted) TEST CONDITIONS‡ PARAMETER Output voltage 3 5 V ≤ VI ≤ 10 V 3.5 IO = 10 mA mA, Dropout voltage 45 V VI = 2 2.45 IO = 100 mA mA, VI = 2 2.45 45 V IO = 500 mA mA, VI = 2 2.45 45 V Output regulation MIN 0°C to 125°C 2.45 25°C 5.
PAGE 6
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 electrical characteristics at TJ = 25°C, VI(IN) = 3.5 V, IO = 10 mA, EN = 0 V, Co = 4.7 µF/CSR† = 1 Ω, SENSE shorted to OUT (unless otherwise noted) TEST CONDITIONS‡ PARAMETER Output voltage 3.5 V ≤ VI ≤ 10 V Dropout voltage IO = 10 mA, IO = 100 mA, VI = 2.45 V VI = 2.45 V IO = 500 mA, VI = 2.
PAGE 7
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE DROPOUT VOLTAGE vs FREE-AIR TEMPERATURE 2.55 0.4 VI = 3.5 V 2.54 VI = 2.45 V 0.35 IO = 500 mA 0.3 2.52 Drpoout Voltage – V VO – Output Voltage – V 2.53 2.51 2.5 IO = 10 mA 2.49 2.48 IO = 500 mA 2.47 0.25 0.2 0.15 0.1 IO = 100 mA 2.46 0.05 2.
PAGE 8
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 TYPICAL CHARACTERISTICS TYPICAL REGIONS OF STABILITY OUTPUT VOLTAGE vs OUTPUT CURRENT COMPENSATION SERIES RESISTANCE vs OUTPUT CURRENT 2.55 CSR – Compensation Series Resistance – Ω 100 2.54 VO – Output Voltage – V 2.53 2.52 2.51 2.5 VI = 10 V 2.49 VI = 3.5 V 2.48 2.47 2.46 2.45 0 100 400 200 300 IO – Output Current – mA VI = 3.5 V No Input Capacitance Co = 4.
PAGE 9
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 TYPICAL CHARACTERISTICS TYPICAL REGIONS OF STABILITY TYPICAL REGIONS OF STABILITY † COMPENSATION SERIES RESISTANCE vs ADDED CERAMIC CAPACITANCE COMPENSATION SERIES RESISTANCE vs OUTPUT CURRENT 100 VI = 3.5 V No Input Capacitance IO= 500 mA Co = 4.7 µF TA = 25°C 10 CSR – Compensation Series Resistance – Ω CSR – Compensation Series Resistance – Ω 100 Region of Instability 1 Region of Instability 0.1 0 0.1 0.2 0.3 0.4 0.
PAGE 10
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 TYPICAL CHARACTERISTICS TYPICAL REGIONS OF STABILITY † COMPENSATION SERIES RESISTANCE vs ADDED CERAMIC CAPACITANCE CSR – Compensation Series Resistance – Ω 100 VI = 3.5 V No Input Capacitance Co = 10 µF IO = 500 mA TA = 25°C 10 Region of Instability 1 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Added Ceramic Capacitance – µF † CSR values below 0.1 Ω are not recommended.
PAGE 11
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 THERMAL INFORMATION In response to system-miniaturization trends, integrated circuits are being offered in low-profile and fine-pitch surface-mount packages. Implementation of many of today’s high-performance devices in these packages requires special attention to power dissipation.
PAGE 12
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 THERMAL RESISTANCE, JUNCTION-TO-AMBIENT vs AIR FLOW 190 THERMAL RESISTANCE, JUNCTION-TO-AMBIENT vs AIR FLOW RθJA – Thermal Resistance, Junction-to-Ambient – °C/W RθJA – Thermal Resistance, Junction-to-Ambient – °C/W THERMAL INFORMATION Component /Board System 20-Lead TSSOP 0 cm2 170 1 cm2 150 2 cm2 130 110 90 4 cm2 8 cm2 70 50 0 50 100 150 200 Air Flow – ft /min 250 300 190 Component /Board System 20-Lead TSSOP Inc
PAGE 13
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 THERMAL INFORMATION For a 20-lead TSSOP / FR4 board system with thermally conductive compound between the board and the device body, where TA = 55°C, airflow = 100 ft /min, and copper heat sink area = 1 cm2, the maximum power-dissipation limit can be calculated.
PAGE 14
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 APPLICATION INFORMATION TPS71025† VI 8 9 10 C1 0.1 µF 50 V 6 IN SENSE IN OUT IN EN OUT 15 14 VO 13 + C o 10 µF GND 1 2 3 CSR † Capacitor selection is nontrivial. See external capacitor requirements section. Figure 19. Typical Application Circuit The TPS71025 low-dropout (LDO) regulator overcomes many of the shortcomings of earlier-generation LDOs, while adding features such as a power-saving shutdown mode.
PAGE 15
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 APPLICATION INFORMATION external capacitor requirements An input capacitor is not required; however, a ceramic bypass capacitor (0.047 pF to 0.1 µF) improves load transient response and noise rejection if the TPS71025 is located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated.
PAGE 16
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 APPLICATION INFORMATION external capacitor requirements (continued) All load and temperature conditions with up to 1 µF of added ceramic load capacitance: PART NO. MFR. VALUE MAX ESR† SIZE (H × L × W)† T421C226M010AS Kemet 22 µF, 10 V 0.5 2.8 × 6 × 3.2 593D156X0025D2W Sprague 15 µF, 25 V 0.3 2.8 × 7.3 × 4.3 593D106X0035D2W Sprague 10 µF, 35 V 0.3 2.8 × 7.3 × 4.3 10 µF, 35 V 0.3 2.8 × 7.3 × 4.
PAGE 17
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN PINS ** 0.050 (1,27) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.244 (6,20) 0.228 (5,80) 0.008 (0,20) NOM 0.157 (4,00) 0.150 (3,81) 1 Gage Plane 7 A 0.010 (0,25) 0°– 8° 0.044 (1,12) 0.016 (0,40) Seating Plane 0.
PAGE 18
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 MECHANICAL DATA P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0°– 15° 0.010 (0,25) M 0.010 (0,25) NOM 4040082 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B.
PAGE 19
TPS71025 LOW-DROPOUT VOLTAGE REGULATOR SLVS162A – MAY 1997 – REVISED MAY 1998 MECHANICAL DATA PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° 0,75 0,50 A Seating Plane 1,20 MAX 0,10 0,05 MIN PINS ** 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064 / E 08/96 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.
PAGE 21
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS71025DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS71025PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.
PAGE 22
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS71025DR SOIC D 8 2500 367.0 367.0 35.0 TPS71025PWR TSSOP PW 20 2000 367.0 367.0 38.
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