Datasheet

TPS709
SBVS186E –MARCH 2012–REVISED NOVEMBER 2013 www.ti.com
APPLICATION INFORMATION
The TPS709xx are a series of devices that belong to a new family of next-generation voltage regulators. These
devices consume low quiescent current and deliver excellent line and load transient performance. This
performance, combined with low noise, very good PSRR with little (V
IN
– V
OUT
) headroom, makes these devices
ideal for RF portable applications, current limit, and thermal protection. The TPS709xx are specified from –40°C
to +125°C.
BOARD LAYOUT RECOMMENDATIONS TO IMPROVE PSRR AND NOISE PERFORMANCE
Input and output capacitors should be placed as close to the device pins as possible. To improve ac performance
(such as PSRR, output noise, and transient response), TI recommends that the board be designed with separate
ground planes for V
IN
and V
OUT
, with the ground plane connected only at the GND pin of the device. In addition,
the ground connection for the output capacitor should be connected directly to the device GND pin.
INTERNAL CURRENT LIMIT
The TPS709xx internal current limit helps protect the regulator during fault conditions. During current limit, the
output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output
voltage is not regulated, and can be measured as (V
OUT
= I
LIMIT
× R
LOAD
). The PMOS pass transistor dissipates
[(V
IN
– V
OUT
) × I
LIMIT
] until a thermal shutdown is triggered and the device turns off. As the device cools down, it
is turned on by the internal thermal shutdown circuit. If the fault condition continues, the device cycles between
current limit and thermal shutdown; see the Thermal Information section for more details.
The TPS709xx are characterized over the recommended operating output current range up to 150 mA. The
internal current limit begins to limit the output current at a minimum of 200 mA of output current. The TPS709xx
continue to operate for output currents between 150 mA and 200 mA but some data sheet parameters may not
be met.
DROPOUT VOLTAGE
The TPS709xx use a PMOS pass transistor to achieve low dropout. When (V
IN
– V
OUT
) is less than the dropout
voltage (V
DO
), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the
R
DS(ON)
of the PMOS pass element. V
DO
approximately scales with the output current because the PMOS device
behaves like a resistor in dropout.
The ground pin current of many linear voltage regulators increases substantially when the device is operated in
dropout. This increase in ground pin current while operating in dropout can be several orders of magnitude larger
than when the device is not in dropout. The TPS709xx employ a special control loop that limits the increase in
ground pin current while operating in dropout. This functionality allows for the most efficient operation while in
dropout conditions tht can greatly increase battery run times.
INPUT AND OUTPUT CAPACITOR
The TPS709xx are stable with output capacitors with an effective capacitance of 2.0 μF or greater for output
voltages below 1.5 V. For output voltages equal or greater than 1.5 V, the minimum effective capacitance for
stability is 1.5 µF. The maximum capacitance for stability is 47 µF. The equivalent series resistance (ESR) of the
output capacitor should be between 0 Ω and 0.2 Ω for stability.
The effective capacitance is the minimum capacitance value of a capacitor after taking into account variations
resulting from tolerances, temperature, and dc bias effects. X5R- and X7R-type ceramic capacitors are
recommended because these capacitors have minimal variation in value and ESR over temperature.
Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1-µF to
2.2-µF capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient
response, input ripple, and PSRR. An input capacitor is necessary if line transients greater than 10 V in
magnitude are anticipated.
TRANSIENT RESPONSE
As with any regulator, increasing the output capacitor size reduces over- and undershoot magnitude, but
increases transient response duration.
12 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated