Datasheet

TPS70445, TPS70448
TPS70451, TPS70458
TPS70402
SLVS307F –SEPTEMBER 2000–REVISED APRIL 2010 www.ti.com
FB1 and FB2
FB1 and FB2 are input terminals used for adjustable-output devices and must be connected to the external
feedback resistor divider. FB1 and FB2 connections should be as short as possible. It is essential to route them
in such a way as to minimize or avoid noise pickup. Adding RC networks between FB terminals and V
OUT
terminals to filter noise is not recommended because these networks can cause the regulators to oscillate.
RESET Indicator
RESET is an active low, open drain output and requires a pullup resistor for normal operation. When pulled up,
RESET goes into a high impedance state (that is, logic high) after a 120-ms delay when both of the following
conditions are met. First, V
IN1
must be above the undervoltage condition. Second, the manual reset (MR) pin
must be in a high impedance state. To monitor V
OUT1
, the PG1 output pin can be connected to MR. To monitor
V
OUT2
, the PG2 output pin can be connected to MR. If RESET is not used, it can be left floating.
V
IN1
and V
IN2
V
IN1
and V
IN2
are inputs to each regulator. Internal bias voltages are powered by V
IN1
.
V
OUT1
and V
OUT2
V
OUT1
and V
OUT2
are output terminals of each regulator.
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