Datasheet

Test Results
4-4
Test Results
In Figure 4–5, ENABLE (CH1) is pulsed. SEQUENCE can be either low or
high. With PG1 tied to MR1, RESET (CH4) goes high 120 ms after both V
OUT1
and V
OUT2
have reached 95% of their respective regulated output voltages.
Figure 4–5. Timing Including RESET
V
IN1
= 4.3 V
V
IN2
= 2.8 V
I
OUT1
= 0.6 A
I
OUT2
= 1.1 A
In Figure 4–6, V
OUT1
(CH1) is pulsed into a shorted condition. Because
SEQUENCE is low, V
OUT2
(CH2) is disabled after the internal current limit
circuitry disables V
OUT1
. PG1 (CH3), which is tied to MR1, goes low when
V
OUT1
falls below 95% of its regulated voltage. RESET (CH4) follows MR1.
Figure 4–6. Timing When SEQUENCE Is Low, With a Fault on V
OUT1
V
IN1
= 4.3 V
V
IN2
= 2.8 V
V
OUT1
(CH1) = no load to a
shorted condition
V
OUT2
(CH2) = 1 mA load