Datasheet

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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
TPS70145, TPS70148
TPS70151, TPS70158
TPS70102
SLVS222D – DECEMBER 1999 – REVISED NOVEMBER 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
T
J
REGULATOR 1 V
O
(V) REGULATOR 2 V
O
(V) TSSOP (PWP)
3.3V 1.2V TPS70145PWP
3.3V 1.5V TPS70148PWP
-40 ° C to +125 ° C 3.3V 1.8V TPS70151PWP
3.3V 2.5V TPS70158PWP
Adjustable (1.22V to 5.5V) Adjustable (1.22V to 5.5V) TPS70102PWP
(2)
(1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
(2) The TPS70102 is programmable using external resistor dividers (see Application Information). The PWP package is available taped
and reeled. Add an R suffix to the device type (for example, TPS70102PWPR).
Over operating free-air temperature range (unless otherwise noted)
(1)
TPS701xx UNIT
Input voltage range: V
IN1
, V
IN2
(2)
-0.3 to +7 V
Voltage range at EN -0.3 to +7 V
Output voltage range (V
OUT1
, V
SENSE1
) 5.5 V
Output voltage range (V
OUT2
, V
SENSE2
) 5.5 V
Maximum RESET, PG1 voltage 7 V
Maximum MR1, MR2, and SEQ voltage V
IN1
V
Peak output current Internally limited —
Continuous total power dissipation See Dissipation Ratings Table —
Junction temperature range, T
J
-40 to +150 ° C
Storage temperature range, T
stg
-65 to +150 ° C
ESD rating, HBM 2 kV
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are tied to network ground.
DERATING
PACKAGE AIR FLOW (CFM) TA ≤ 25 ° C TA = 70 ° C TA = 85 ° C
FACTOR
0 3.067W 30.67mW/ ° C 1.687W 1.227W
PWP
(1)
250 4.115W 41.15mW/ ° C 2.265W 1.646W
(1) This parameter is measured with the recommended copper heat sink pattern on a 4-layer PCB, 1 oz. copper on a 4-in by 4-in ground
layer. For more information, refer to TI technical brief SLMA002.
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