Datasheet

Sequence_Start
REGEN
VIO
VPLL1
VDD2
VDD1
32KCLKOUT
SYSEN
CLKEN
HFCLKOUT
NRESPWRON
4638 msbatterydetection
1068 ms-3MHzoscillatorsetting+clockswitch
1052 msforVDD2stabilization
1072 msforVIOstabilization
1007 msforVDD1stabilization
610 ms
5.2ms
61 ms
3418 ms
122 msforLDOstabilization
2034 msforDcDcI/Ostabilization
1.8V
1.3V
1.3V
1.3V
032-011
TPS65950
www.ti.com SWCS032E–OCTOBER 2008–REVISED JANUARY 2011
Figure 4-9. Timings—OMAP2 Power-On Sequence
4.5.3.3 OMAP3 Power-On Sequence
Figure 4-10 shows the timing and control that must occur in Master_C021_Generic mode. Sequence_Start
occurs according to the events shown in Figure 4-8.
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