Datasheet
TPS65950
SWCS032E–OCTOBER 2008–REVISED JANUARY 2011
www.ti.com
List of Figures
1-1 TPS65950 Block Diagram....................................................................................................... 13
2-1 PBGA Bottom View .............................................................................................................. 14
4-1 Power Provider Block Diagram................................................................................................. 33
4-2 VDD1 dc-dc Regulator Efficiency .............................................................................................. 36
4-3 VDD1 dc-dc Application Schematic............................................................................................ 37
4-4 VDD2 dc-dc Regulator Efficiency .............................................................................................. 39
4-5 VDD2 dc-dc Application Schematic............................................................................................ 40
4-6 VIO dc-dc Regulator Efficiency in Active Mode .............................................................................. 42
4-7 VIO dc-dc Application Schematic .............................................................................................. 43
4-8 Timings Before Sequence Start ............................................................................................... 60
4-9 Timings—OMAP2 Power-On Sequence ...................................................................................... 61
4-10 Timings—OMAP3 Power-On Sequence ...................................................................................... 62
4-11 Timings—Power On in Slave_C021_Generic Model ........................................................................ 63
4-12 Power-Off Sequence in Master Modes........................................................................................ 64
6-1 Audio/Voice Module Block Diagram ........................................................................................... 67
6-2 Earphone Amplifier............................................................................................................... 67
6-3 Earphone Speaker ............................................................................................................... 68
6-4 8-Ω Stereo Hands-Free Amplifiers............................................................................................. 68
6-5 8-Ω Stereo Hands-Free ......................................................................................................... 70
6-6 Headset Amplifier ................................................................................................................ 70
6-7 Headset 4-Wire Stereo Jack Without an External FET...................................................................... 72
6-8 Headset 4-Wire Stereo Jack With an External FET ......................................................................... 73
6-9 Headset 5-Wire Stereo Jack.................................................................................................... 74
6-10 Headset 4-Wire Stereo Jack Optimized....................................................................................... 75
6-11 Headset Pop-Noise Cancellation Diagram.................................................................................... 76
6-12 Predriver for External Class D.................................................................................................. 77
6-13 Vibrator H-Bridge ................................................................................................................. 79
6-14 Carkit Output Downlink Path Characteristics ................................................................................. 79
6-15 Digital Audio Filter Downlink Path Characteristics ........................................................................... 80
6-16 Digital Voice Filter Downlink Path Characteristics ........................................................................... 80
6-17 Voice Downlink Frequency Response With F
S
= 8 kHz..................................................................... 81
6-18 Voice Downlink Frequency Response With F
S
= 16 kHz ................................................................... 82
6-19 Analog and Digital Microphone Multiplexing.................................................................................. 85
6-20 Analog Microphone Pseudodifferential ........................................................................................ 87
6-21 Analog Microphone Differential................................................................................................. 87
6-22 Digital Microphone Bias Module Block Diagram ............................................................................. 88
6-23 Digital Microphone Bias Module Timing Diagram............................................................................ 89
6-24 Silicon Microphone Module ..................................................................................................... 90
6-25 Audio Auxiliary Input ............................................................................................................. 91
6-26 Example of PDM Interface Circuitry ........................................................................................... 92
6-27 Uplink Amplifier ................................................................................................................... 93
6-28 Carkit Input Uplink Path Characteristics ...................................................................................... 93
6-29 Digital Audio Filter Uplink Path Characteristics .............................................................................. 94
6-30 Digital Audio Filter Uplink Path Characteristics .............................................................................. 95
6-31 Voice Uplink Frequency Response With F
S
= 8 kHz (Frequency Range 0 to 600 Hz) ................................. 96
6-32 Voice Uplink Frequency Response With F
S
= 8 kHz (Frequency Range 3000 to 3600 Hz) ........................... 96
6-33 Voice Uplink Frequency Response With F
S
= 16 kHz (Frequency Range 0 to 600 Hz)................................ 97
6 List of Figures Copyright © 2008–2011, Texas Instruments Incorporated