Datasheet
50-msclock
50ms
Event1detectedon32K
clocksynchronizedwith
50-msclock
Event1
Debouncedafter50ms
50ms+dT
Event1
Event2
32Kclock
31 ms
Event2
Debouncedafter50ms+dT
50ms
dT
032-084
TPS65950
SWCS032E–OCTOBER 2008–REVISED JANUARY 2011
www.ti.com
Figure 14-1. Debouncing Sequence Chronogram Example
Event 1 is correctly debounced after 50 ms. Event 2 is debounced after 50 ms + dT because the capture
of the event is considered after the next rising edge of the 50-ms clock.
154 Debouncing Time Copyright © 2008–2011, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TPS65950