Datasheet

TPS65950
SWCS032EOCTOBER 2008REVISED JANUARY 2011
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13 Timing Requirements and Switching Characteristics
13.1 Timing Parameters
The timing parameter symbols used in the timing requirement and switching characteristic tables are
created in accordance with JEDEC Standard 100. To shorten the symbols, some pin names and other
related terminologies are abbreviated as shown in Table 13-1.
Table 13-1. Timing Parameters
Lowercase Subscripts
Symbol Parameter
c Cycle time (period)
d Delay time
dis Disable time
en Enable time
h Hold time
su Setup time
START Start-bit
t Transition time
v Valid time
w Pulse duration (width)
X Unknown, changing, or don't care level
H High
L Low
V Valid
IV Invalid
AE Active edge
FE First edge
LE Last edge
Z High impedance
13.2 Target Frequencies
Table 13-2 assumes testing over the recommended operating conditions.
Table 13-2. TPS65950 Interface Target Frequencies
Target Frequency
I/O Interface Interface Designation
1.5 V
SmartReflex I
2
C I
2
C interface Slave HS mode 3.6 Mbps
GP I
2
C Slave fast-speed mode 400 kbps
Slave standard mode 100 kbps
USB HS 480 Mbps
USB FS 12 Mbps
LS 1.5 Mbps
RealView® ICE tool 30 MHz
JTAG XDS560 and XDS510 tools 30 MHz
Lauterbach™ tool 30 MHz
144 Timing Requirements and Switching Characteristics Copyright © 2008–2011, Texas Instruments Incorporated
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