Datasheet

HFCLKIN
CH0 CH1 CH1
032-065
TPS65950
www.ti.com SWCS032E–OCTOBER 2008–REVISED JANUARY 2011
NOTE
The timer default value must be the worst case (10 ms) for the clock providers. For legacy or
workaround support, the signals NSLEEP1 and NSLEEP2 can also be used as a clock
request even if it is not their primary goal. By default, this feature is disabled and must be
enabled individually by setting the register bits associated with each signal.
When the external clock signal is present on the HFCLKIN ball, it is possible to use this clock instead of
the internal RC oscillator and then synchronize the system on the same clock. The RC oscillator can then
go to idle mode.
Table 12-2 lists the input clock electrical characteristics of the HFCLKIN input clock.
Table 12-2. HFCLKIN Input Clock Electrical Characteristics
Parameter Configuration Mode Slicer Min Typ Max Unit
Frequency 19, 26, or 38.4 MHz
Startup time LP/HP (sine wave) 4 μs
Input dynamic range LP/HP (sine wave) 0.3 0.7 1.45 V
PP
BP/PD (square wave) 0 1.8
5 (1)
Current consumption LP 175 μA
HP 235
BP/PD 39 nA
Harmonic content of input signal (with 0.7-V
PP
LP/HP (sine wave) –25 dBc
amplitude): second component
Voltage input high (V
IH
) BP (square wave) 1 V
Voltage input low (V
IL
) BP (square wave) 0.6 V
(1) Bypass input max voltage is the same as the maximum voltage provided for the I/O interface (IO.1P8V).
Table 12-3 lists the input clock timing requirements of the HFCLKIN input clock when the source is a
square wave.
Table 12-3. HFCLKIN Square Input Clock Timing Requirements With Slicer in Bypass
Name Parameter Description Min Typ Max Unit
CH0 1/t
C(HFCLKIN)
Frequency, HFCLKIN 19.2, 26, or 38.4 MHz
CH1 t
W(HFCLKIN)
Pulse duration, HFCLKIN low or high 0.45*t
C(HFCLKIN)
0.55*t
C(HFCLKIN)
ns
CH3 t
R(HFCLKIN)
Rise time, HFCLKIN
(1)
5 ns
CH4 t
F(HFCLKIN)
Fall time, HFCLKIN
(1)
5 ns
(1) Default drive capability is 40 pF.
Figure 12-4 shows the timing of the HFCLKIN squared input clock.
Figure 12-4. HFCLKIN Squared Input Clock
12.2.3 32-kHz Input Clock
A 32.768-kHz input clock (often abbreviated to 32-kHz) generates the clocks for the RTC. It has a low-jitter
mode where the current consumption increases for lower jitter. It is possible to use the 32-kHz input clock
with an external crystal or clock source. Depending on the mode, the 32K oscillator is configured as being
either:
Copyright © 2008–2011, Texas Instruments Incorporated Clock Specifications 135
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