Datasheet

HFCLKIN
SLEEP1
SLEEP2
CLKEN
Clock
generator
CLKREQ
Mainstate-machine
Optionalrequest
configurablebysoftware
onlyforlegacysupport
HFCLKOUT
Slicer
Timer
CLKEN2
SLICER_OK
Slicerbypass
032-063
TPS65950
SWCS032E–OCTOBER 2008–REVISED JANUARY 2011 www.ti.com
12.2 Input Clock Specifications
The clock system accepts two input clock sources:
• 32-kHz crystal oscillator clock or sinusoidal/squared clock
• HFCLKIN high-frequency input clock
12.2.1 Clock Source Requirements
Table 12-1 lists the input clock requirements.
Table 12-1. TPS65950 Input Clock Source Requirements
Pad Clock Frequency Stability Duty Cycle
Crystal ±30 ppm 40%/60%
32KXIN
32.768 kHz Square wave – 45%/55%
32KXOUT
Sine wave – –
Square wave ±150 ppm See
(1)
HFCLKIN 19.2, 26, 38.4 MHz
Sine wave – –
(1) HFCLK duty cycle and frequency is not altered by the internal circuit. The input clock accuracy must
match that of the system requirement, for example, OMAP device.
12.2.2 High-Frequency Input Clock
HFCLKIN is the high-frequency input clock. It can be a square- or sine-wave input clock. If a square-wave
input clock is provided, it is recommended to switch the block to bypass mode when possible to avoid
loading the clock.
Figure 12-2 shows the HFCLKIN clock distribution.
Figure 12-2. HFCLKIN Clock Distribution
132 Clock Specifications Copyright © 2008–2011, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TPS65950