Datasheet

TPS65950
SWCS032E–OCTOBER 2008–REVISED JANUARY 2011 www.ti.com
Table 7-9. LS/FS Differential Transmitter (continued)
Parameter Comments Min Typ Max Unit
LS width of SE0 interval during Pulldowns R = 15 kΩ on DP and DM
t
LST
210 ns
differential transition Pullup R = 1.5 kΩ at 3.6 V on DM only
Pulldowns R = 15 kΩ on DP and DM
Driver power-up time TPWR_UP_TXD 0 100 200 μs
Pullup R = 1.5 kΩ at 3.6 V on DM only
FS source driver jitter to next
t
SDJ1
C
L
= 50 pF on DP and DM –2 2 ns
transition
FS source driver jitter for paired
t
SDJ2
C
L
= 50 pF on DP and DM –1 1 ns
transitions
LS upstream facing port source C
L
= [200–600] pF on DP and DM
t
USDJ1
–25 25 ns
driver jitter (next transition) Pullup R = 1.5 kΩ at 3.6 V for DM only
LS upstream facing port source C
L
= [200–600] pF on DP and DM
t
USDJ2
–10 10 ns
driver jitter (next transition) Pullup R = 1.5 kΩ at 3.6 V for DM only
Pulldowns R = 15 kΩ on DP and DM
Output signal cross-over voltage Vcrs 1.3 2 V
Pullup R = 1.5 kΩ at 3.6 V on DM only
High (driven) V
OH
Pulldowns R = 15 kΩ on DP and DM 2.8 3.3 3.6 V
Pullups R = 1.5 kΩ at 3.6 V on DP and
Low V
OL
0 0.1 0.3 V
DM
Driver output resistance Z
DRV
/R
S
28 36 44 Ω
7.2.4.5 HS Differential Receiver
The HS receiver consists of the following blocks:
• A differential input comparator to receive the serial data
• A squelch detector to qualify the received data
• An oversampler-based clock data recovery scheme followed by a nonreturn to zero inverted (NRZI)
decoder, bit unstuffing, and a serial-to-parallel converter to generate the UTMI DATAOUT
Table 7-10 lists the parameters of the HS differential receiver.
Table 7-10. HS Differential Receiver
Parameter Comments Min Typ Max Unit
Input Levels for HS
HS squelch detection threshold V
HSSQ
(Differential signal amplitude) 100 125 150 mV
HS disconnect detection threshold V
HSDSC
(Differential signal amplitude) 525 600 625 mV
HS data signaling common mode voltage range V
HSCM
–50 200 500 mV
HS differential input sensitivity V
DIHS
(Differential signal amplitude) –100 100 mV
Input Impedance for HS
Internal specification for input capacitance C
HSLOAD
11 pF
Internal C
HSLOAD
DP/DM matching C
HSLOADM
0.2 pF
External Components With the Total Budget Combined (Without USB Cable Load)
External capacitance on DP or DM 2 pF
External series resistance on DP or DM 1 Ω
7.2.4.6 HS Differential Transmitter
The HS transmitter is always operated on the UTMI parallel interface. The parallel data on the interface is
serialized, bit-stuffed, NRZI-encoded, and transmitted as a dc output current on DP or DM, depending on
the data. Each line has an effective 22.5-Ω load to ground, which generates the voltage levels for
signaling.
A disconnect detector is also part of the HS transmitter. A disconnect on the far end of the cable causes
the impedance seen by the transmitter to double, thereby doubling the differential amplitude seen on the
DP/DM lines.
108 USB HS 2.0 OTG Transceiver Copyright © 2008–2011, Texas Instruments Incorporated
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