Datasheet

Signalswing
limitingcircuit
Biasgenerator
andstartup
circuit
XI
XO
Signal
shaping
Squarewave:
Vpp=VIO_1P8V
Y
Currentcontrol
circuitandmode
selection
Floating
VBATOK
(1)
Internal
GND
Internal
GND
VBATOK
(1)
037-040
TPS65930/TPS65920
SWCS037G–MAY 2008– REVISED APRIL 2011 www.ti.com
(1) Switches close by default and open only if register access enables very-low-power mode when VBAT < 2.7 V.
Figure 11-9. 32-kHz Oscillator in Bypass Mode Block Diagram Without Crystal Option 3
Table 11-7 lists the electrical constraints required by the 32-kHz input square- or sine-wave clock.
Table 11-7. 32-kHz Input Square- or Sine-Wave Clock Source Electrical Characteristics
Name Parameter Description Min Typ Max Unit
f Frequency 32.768 kHz
C
I
Input capacitance 35 pF
C
FI
On-chip foot capacitance to GND on each input (see Figure 11-7, Figure 11-8, and 10
pF
Figure 11-9)
V
PP
Square-/sine-wave amplitude in bypass mode or not 1.8
(1)
V
V
IH
Voltage input high, square wave in bypass mode 0.8 V
V
IL
Voltage input low, square wave in bypass mode 0.6 V
(1) Bypass input maximum voltage is the same as the maximum voltage provided for the I/O interface.
Table 11-8 lists the timing requirements of the 32-kHz square-wave input clock.
Table 11-8. 32-kHz Square-Wave Input Clock Source Timing Requirements
Name Parameter Description Min Typ Max Unit
CK0 1/t
C(32KHZ)
Frequency, 32 kHz 32.768 MHz
CK1 t
W(32KHZ)
Pulse duration, 32 kHz low or high 0.45*t
C(32KHZ)
0.55*t
C(32KHZ)
μs
CK3 t
R(32KHZ)
Rise time, 32 kHz
(1)
0.1*t
C(32KHZ)
μs
CK4 t
F(32KHZ)
Fall time, 32 kHz
(1)
0.1*t
C(32KHZ)
μs
(1) The capacitive load is 30 pF.
90 Clock Specifications Copyright © 2008–2011, Texas Instruments Incorporated
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