Datasheet

HFCLKIN
SLEEP1
SLEEP2
CLKEN
Clock
generator
CLKREQ
Mainstate-machine
Optionalrequest
configurablebysoftware
onlyforlegacysupport
HFCLKOUT
Slicer
Timer
CLKEN2
SLICER_OK
Slicerbypass
037-044
TPS65930/TPS65920
SWCS037G–MAY 2008– REVISED APRIL 2011 www.ti.com
11.2 Input Clock Specifications
The clock system accepts two input clock sources:
• 32-kHz crystal oscillator clock or sinusoidal/squared clock
• HFCLKIN high-frequency input clock
11.2.1 Clock Source Requirements
Table 11-1 lists the input clock requirements.
Table 11-1. TPS65920/TPS65930 Input Clock Source Requirements
Pad Clock Frequency Stability Duty Cycle
Crystal ±30 ppm 40%/60%
32KXIN
32.768 kHz Square wave – 45%/55%
32KXOUT
Sine wave – –
Square wave ±150 PPM See
(1)
HFCLKIN 19.2, 26, 38.4 MHz
Sine wave – –
(1) HFCLK duty cycle and frequency is not altered by the internal circuit. The input clock accuracy must
match that of the system requirement; for example, OMAP device.
11.2.2 HFCLKIN
HFCLKIN can be a square- or a sine-wave input clock. If a square-wave input clock is provided, it is
recommended to switch the block to bypass mode to avoid loading the clock.
Figure 11-2 shows the HFCLKIN clock distribution.
Figure 11-2. HFCLKIN Clock Distribution
When a device needs a clock signal other than 32.768 kHz, it makes a clock request and activates the
84 Clock Specifications Copyright © 2008–2011, Texas Instruments Incorporated
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