Datasheet

C P.G N D
DATA7
DATA6
DATA5
DATA4
DATA3/CTSO
DATA2/RTSI
DATA1/TX
DATA0/RX
NXT
DIR
STP
USB2.0
HS-OTG
transceiver
withCEA
carkitinterface
C
VBUS1
VBAT
C
VBUS.FC
C P.C A P P
C P.C A P N
C P.IN
C
VBUS.IN
USBCP
VINTU SB.1P8
C
VINTUSB.1P8
.*
VINTU SB.1P5
C
VINTUSB.1P5
VUSB.3P1
C
VUSB.3P1
CP.OUT
Hostprocessor
UCLK
GND
VBUS
DM/UART3.TXD
DP/UART3.RXD
ID
C
VBUS2
USB-CEA
carkit
connector
C
VBAT.USB
Device
037-012
TPS65930/TPS65920
SWCS037G–MAY 2008– REVISED APRIL 2011 www.ti.com
– UART signaling
– Audio (mono/stereo) signaling
– UART transactions during audio signaling
– Basic and smart 4-wire/5-wire carkit, chargers, and accessories
– ID CEA resistor comparators
• UTMI+ Low Pin Interface Specification (hereafter referred to as the ULPI specification):
– 12-pin ULPI with 8-pin parallel data for USB signaling and register access
– 60-MHz clock generation
– Register mapping
Figure 7-2 is the USB system application schematic.
Figure 7-2. USB System Application Schematic
NOTE
For the component values, see Table 14-1.
7.1.2 HS USB Port Timing
The ULPI interface supports an 8-bit data bus and the internal clock mode. The 4-bit data bus and the
external clock mode are not supported.
The HS functional mode supports an operating rate of 480 Mbps.
Table 7-1 and Table 7-2 assume testing over the recommended operating conditions (see Figure 7-3).
70 USB Transceiver Copyright © 2008–2011, Texas Instruments Incorporated
Submit Documentation Feedback
focus.ti.com: TPS65930/TPS65920