Datasheet

TPS65930/TPS65920
SWCS037G–MAY 2008– REVISED APRIL 2011 www.ti.com
11-14 32KCLKOUT and HFCLKOUT Clock Stabilization Time.................................................................... 93
11-15 HFCLKOUT Behavior ........................................................................................................... 93
12-1 I
2
C Interface—Transmit and Receive in Slave Mode........................................................................ 96
12-2 I2S Interface—I2S Master ModeI .............................................................................................. 98
12-3 I2S Interface—I2S Slave Mode................................................................................................. 98
12-4 TDM Interface—TDM Master Mode .......................................................................................... 100
12-5 JTAG Interface Timing ......................................................................................................... 102
13-1 Debouncing Sequence Chronogram Example.............................................................................. 103
15-1 Printed Device Reference ..................................................................................................... 107
15-2 TPS65920/TPS65930 Mechanical Package Bottom View ................................................................ 108
15-3 Ball Size.......................................................................................................................... 108
6 List of Figures Copyright © 2008–2011, Texas Instruments Incorporated