Datasheet

TPS65930/TPS65920
SWCS037G–MAY 2008– REVISED APRIL 2011 www.ti.com
Table 2-2. Signal Description (continued)
Default Configuration After Reset
Released
Signal TPS65920 TPS65930 Features
Module Description Type
Internal
Name Ball Ball Not Used
(1)
Signal Type Pull or
Not
Open
SYSEN System enable output D8 D8 SYSEN OD PU Floating
drain/I
CLKEN Clock enable O A4 A4 CLKEN O Floating
CLKREQ Clock request I B13 B13 CLKREQ I PD GND
INT1 Output interrupt line 1 O C10 C10 INT1 O Floating
Output control the NRESPWRON
NRESPWRON O C8 C8 NRESPWRON O Floating
of the application processor
Input; detect user action on the
NRESWARM I B9 B9 NRESWARM I GND
reset button
Input; detect a control command
PWRON I D10 D10 PWRON I VBAT
to start or stop the system
CONTROL
NSLEEP1 Sleep request from device 1 I G5 G5 NSLEEP1 I GND
CLK256FS O E10 E10 CLK256FS O Floating
Digital voltage scaling linked with
VMODE1 I E4 E4 VMODE1 I GND
VDD1
BOOT0 Boot pin 0 I E8 E8 BOOT0 I PD N/A
BOOT1 Boot pin 1 I D7 D7 BOOT1 I PD N/A
Open
REGEN Enable signal for external LDO B8 B8 REGEN OD PU Floating
drain
Security and digital rights
MSECURE I H4 H4 MSECURE I N/A
management
VREF Reference voltage Power L13 L13 VREF Power N/A
VREF
Analog ground for reference Power Power
AGND K13 K13 AGND GND
voltage GND GND
N.C. Not connected
Signal not
B3 B3 Floating
functional
(3)
I2C.SR.SDA I/O
SmartReflex I
2
C data
I
2
C
Smart
Digital voltage scaling linked with
VMODE2 I
Reflex
VDD2
C5 C5 VMODE2 I GND
I2C.SR.SCL I/O
SmartReflex I
2
C data
I2C.CNTL.SDA I/O C3 C3 I2C.CNTL.SDA I/O PU N/A
General-purpose I
2
C data
I
2
C
I2C.CNTL.SCL I/O B4 B4 I2C.CNTL.SCL I/O PU N/A
General-purpose I
2
C clock
I2S.CLK Clock signal (audio port) I/O H3 I2S.CLK I/O Floating
Synchronization signal (audio
I2S.SYNC I/O K2 I2S.SYNC I/O Floating
port)
TDM
I2S.DIN Data receive (audio port) I K4 I2S.DIN I GND
I2S.DOUT Data transmit (audio port) O K3 I2S.DOUT O Floating
MIC.MAIN.P Main microphone left input (P) I D1 MIC.MAIN.P I Cap to GND
ANA.MIC
MIC.MAIN.M Main microphone left input (M) I E1 MIC.MAIN.M I Cap to GND
Hands-
VBAT.RIGHT Battery voltage input Power A10 A10 VBAT.RIGHT Power VBAT
Free
Predriver output left P for
PreDriv.LEFT O
external class-D amplifier
A7 VMID Power Floating
VMID Power
Headset
Predriver output right P for
PreDriv.RIGHT O
external class-D amplifier
A8 ADCIN7 I GND
ADCIN7 General-purpose ADC input 7 I
AUX Input AUXR Auxiliary audio input right I G1 AUXR I Cap to GND
18 Terminal Description Copyright © 2008–2011, Texas Instruments Incorporated
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