Datasheet

50-msclock
50ms
Event1detectedon32K
clocksynchronizedwith
50-msclock
Event1
Debouncedafter50ms
50ms+dT
Event1
Event2
32Kclock
31 ms
Event2
Debouncedafter50ms+dT
50ms
dT
037-029
TPS65930/TPS65920
www.ti.com SWCS037G–MAY 2008–REVISED APRIL 2011
13 Debouncing Time
Table 13-1 lists the characteristics of debouncing.
Table 13-1. Debouncing
Debouncing Functions Block Programmable Debouncing Time Default
USB plug detection USB No 9x50 ms 9x50 ms
0 to 250 ms
Plug/unplug detection VBUS
(1)
USB Yes (32/32468-second 28 ms
steps)
0 to 250 ms
Plug/unplug detection ID
(2)
USB Yes (32/32468-second 50 ms
steps)
Debouncing function interrupt generation
Power Yes 0 to 250 ms 30 ms
debounce for VBUS and ID
(3)
Hot-die detection Thermistor No 60 μs 60 μs
Thermal shutdown detection No 60 μs 60 μs
PWRON
(4)
Start/stop button No 31.25 ms 31.25 ms
NRESWARM Button reset No 60 μs 60 μs
SIM card plug/unplug GPIO Yes 0 or 30 ms ± 1 ms 0 ms
MMC1 (plug/unplug) GPIO Yes 0 or 30 ms ± 1 ms 0 ms
(1) Programmable in the VBUS_DEBOUNCE register
(2) Programmable in the ID_DEBOUNCE register
(3) Programmable in the RESERVED_E[2:0] CFG_VBUSDEB register
(4) The PWRON signal is debounced 1024*CLK32K (maximum 1026*CLK32K) falling edge in master mode.
Figure 13-1 is a sample debouncing sequence chronogram.
Figure 13-1. Debouncing Sequence Chronogram Example
Event1 is correctly debounced after 5 ms. Event2 is debounced after 50ms + dT because the capture of
the event is considered after the next rising edge of the 50-ms clock.
Copyright © 2008–2011, Texas Instruments Incorporated Debouncing Time 103
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