Datasheet

PRODUCTPREVIEW
TPS659121
www.ti.com SWCS078 –JUNE 2012
Table 1-1. TERMINAL FUNCTIONS (continued)
TERMINAL
I/O DESCRIPTION
NAME NO.
TPS659121
LDOAO G3 O "LDO always on" internal supply; connect buffer capacitor
VLDO1 J3 O LDO1 output
VLDO2 H1 O LDO2 output
VLDO3 F9 O LDO3 output
VLDO4 G1 O LDO4 output
VLDO5 G9 O LDO5 output
VLDO6 A3 O LDO6 output
VLDO7 A1 O LDO7 output
VLDO8 H9 O LDO8 output
VLDO9 J9 O LDO9 output
VLDO10 J1 O LDO10 output
STANDARD INTERFACE
digital input that defines whether SPI or I2C and GPIOs is available on pins C4, D4, E4, D5: 0=SPI;
DEF_SPI_I2C-GPIO E7 I
1=I2C and GPIO1 and GPIO2
SCK D5 I I2C SCL for DEF_SPI_I2C=1 or SPI SCK for DEF_SPI_I2C=0
MOSI E4 I/O I2C SDA for DEF_SPI_I2C=1 or SPI MASTER OUT SLAVE IN (MOSI) for DEF_SPI_I2C=0
MISO D4 I/O GPIO1 for DEF_SPI_I2C=1 or SPI MASTER IN SLAVE OUT (MISO) for DEF_SPI_I2C=0
CE C4 I/O GPIO2 for DEF_SPI_I2C=1 or SPI CHIP ENABLE (CE) active HIGH for DEF_SPI_I2C=0
ENABLE / VOLTAGE SCALING
DCDCx_SEL is selected by pulling pin CONFIG2 to GND; this also selects CLK_REQx and
PWR_REQ as enable resources
enable pin or voltage scaling pin changing the output of a converter or a group of converters
DCDC1_SEL E8 I
between 2 pre-defined values
enable pin or voltage scaling pin changing the output of a converter or a group of converters
DCDC2_SEL D8 I
between 2 pre-defined values
enable pin or voltage scaling pin changing the output of a converter or a group of converters
DCDC3_SEL C6 I
between 2 pre-defined values
enable pin or voltage scaling pin changing the output of a converter or a group of converters
DCDC4_SEL C5 I
between 2 pre-defined values
CLK-REQ1, CLK_REQ2 and PWR_REQ is selected by puling pin CONFIG2 to GND
power I2C for dynamic voltage scaling: clock pin or clock request signal1 used to enable and
CLK_REQ1 E5 I
disable power resources
power I2C for dynamic voltage scaling; data pin or clock request signal2 used to enable and disable
CLK_REQ2 E6 I/O
power resources
PWR_REQ G4 I SLEEP mode input or CLK request input
VSUP_OUT G6 O Reset output or output of voltage monitor
VIN_MON G2 I voltage sense for input voltage monitor; output on pin VSUP_OUT
ON D6 I POWERHOLD or ON; enable input
INT1 G5 O interrupt output
active low, debounced power-on input or power request input to start power-up sequencing;
RESIN (optional) D3 I alternatively active low reset input to TPS65912x; debounced by 10ms(OTP option); tie to LDOAO
for a logic high if not used.
OMAP_WDI_32k_OU
F6 I input from OMAP WDI pin to AND gate; alternatively 32kHz RC oscillator output. The option is
T
CPCAP_WDI G7 O push-pull output at VDDIO level of AND gate; connect to CPCAP WDI input
selects pre-defined startup options and default voltages; chooses from two internal OTP settings; tie
CONFIG1 E2 I
to GND or LDOAO
selects pre-defined startup options; configures pins as DCDC1_SEL, DCDC2_SEL, DCDC3_SEL
CONFIG2 D2 I and DCDC4_SEL as well as CLK_REQ and PWR_REQ signals with CONFIG2 tied to GND. Tie to
LDOAO for a logic high level.
Copyright © 2012, Texas Instruments Incorporated INTRODUCTION 5
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