Datasheet

TPS659110, TPS659112, TPS659113, TPS659116
SWCS049L –JUNE 2010–REVISED MARCH 2014 www.ti.com
Table 72. EN1_SMPS_ASS_REG (continued)
Description Configuration Register setting the SMPS Supplies driven by the multiplexed SCLSR_EN1 signal.
When control bit = 1, SMPS Supply state and voltage is driven by the SCLSR_EN1 control signal and is
also defined though SLEEP_KEEP_RES_ON register setting.
When control bit = 0 no effect: SMPS Supply state is driven though registers programming and the
device state.
Any control bit of this register set to 1 will disable the I
2
C SR Interface functionality
Type RW
7 6 5 4 3 2 1 0
Reserved SPARE_EN1 VDD2_EN1 VDD1_EN1 VIO_EN1
VDDCTRL_EN1
Bits Field Name Description Type Reset
7:5 Reserved RO 0x0
R returns
0s
4 SPARE_EN1 Spare bit RW 0
3 VDDCTRL_EN1 When control bit = 1: RW 0
When EN1 is high the supply voltage is programmed though
VDDCtrl_OP_REG register, and it can also be programmed off.
When EN1 is low the supply voltage is programmed though
VDDCtrl_SR_REG register, and it can also be programmed off.
When control bit = 0: No effect: Supply state is driven though registers
programming and the device state
2 VDD2_EN1 When control bit = 1: RW 0
When SCLSR_EN1 is high the supply voltage is programmed though
VDD2_OP_REG register, and it can also be programmed off.
When SCLSR_EN1 is low the supply voltage is programmed though
VDD2_SR_REG register, and it can also be programmed off.
When SCLSR_EN1 is low and SLEEP_KEEP_RES_ON = 1 the SMPS is
working in low-power mode, if not tuned off through VDD2_SR_REG
register.
When control bit = 0 No effect: Supply state is driven though registers
programming and the device state
1 VDD1_EN1 When 1: RW 0
When SCLSR_EN1 is high the supply voltage is programmed though
VDD1_OP_REG register, and it can also be programmed off.
When SCLSR_EN1 is low the supply voltage is programmed though
VDD1_SR_REG register, and it can also be programmed off.
When SCLSR_EN1 is low and SLEEP_KEEP_RES_ON = 1 the SMPS is
working in low-power mode, if not tuned off though VDD1_SR_REG
register.
When control bit = 0 no effect: supply state is driven though registers
programming and the device state
0 VIO_EN1 When control bit = 1, supply state is driven by the SCLSR_EN1 control RW 0
signal and is also defined though SLEEP_KEEP_RES_ON register
setting:
When SCLSR_EN1 is high the supply is on,
When SCLSR_EN1 is low:
- the supply is off (default) or the SMPS is working in low-power mode if
its corresponding control bit = 1 in SLEEP_KEEP_RES_ON register
When control bit = 0 No effect: SMPS state is driven though registers
programming and the device state
Table 73. EN2_LDO_ASS_REG
Address Offset 0x47
Physical Address Instance (RESET DOMAIN: TURNOFF
RESET)
94 Submit Documentation Feedback Copyright © 2010–2014, Texas Instruments Incorporated
Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659116