Datasheet

TPS659110, TPS659112, TPS659113, TPS659116
SWCS049L –JUNE 2010–REVISED MARCH 2014 www.ti.com
Bits Field Name Description Type Reset
7 Reserved RO 0
R returns
0s
6 DCDC_SLEEP_LVL When 1, DCDC output level in SLEEP mode is VDDx_SR_REG, to be RW 0
other than 0 V.
When 0, no effect
5:4 TSLOT_LENGTH Time slot duration programming (EEPROM bit): RW 0x3
When 00: 0 µs
When 01: 200 µs
When 10: 500 µs
When 11: 2 ms
(Default value: See boot configuration)
3 SLEEPSIG_POL When 1, SLEEP signal active-high RW 0
When 0, SLEEP signal active-low
2 PWON_LP_OFF When 1, allows device turn-off after a PWON Long Press (signal low) RW 1
(EEPROM bits).
(Default value: See boot configuration)
1 PWON_LP_RST When 1, allows digital core reset when the device is OFF (EEPROM bit). RW 0
(Default value: See boot configuration)
0 IT_POL INT1 interrupt pad polarity control signal (EEPROM bit): RW 0
When 0, active low
When 1, active high
(Default value: See boot configuration)
Table 67. SLEEP_KEEP_LDO_ON_REG
Address Offset 0x41
Physical Address Instance (RESET DOMAIN: GENERAL
RESET)
Description When corresponding control bit = 0 in EN1_ LDO_ASS register (default setting): Configuration Register
keeping the full load capability of LDO regulator (ACTIVE mode) during the SLEEP state of the device.
When control bit = 1, LDO regulator full load capability (ACTIVE mode) is maintained during device
SLEEP state.
When control bit = 0, the LDO regulator is set or stay in low-power mode during device SLEEP state(but
then supply state can be overwritten programming ST[1:0]). Control bit value has no effect if the LDO
regulator is off.
When corresponding control bit = 1 in EN1_ LDO_ASS register: Configuration Register setting the LDO
regulator state driven by SCLSR_EN1 signal low level (when SCLSR_EN1 is high the regulator is on,
full power):
- the regulator is set off if its corresponding Control bit = 0 in SLEEP_KEEP_LDO_ON register (default)
- the regulator is set in low-power mode if its corresponding control bit = 1 in SLEEP_KEEP_LDO_ON
register
Type RW
7 6 5 4 3 2 1 0
LDO3_KEEPON LDO4_KEEPON LDO7_KEEPON LDO8_KEEPON LDO5_KEEPON LDO2_KEEPON LDO1_KEEPON LDO6_KEEPON
Bits Field Name Description Type Reset
7 LDO3_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1 is RW 0
low
6 LDO4_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1 is RW 0
low
5 LDO7_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1 is RW 0
low
4 LDO8_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1 is RW 0
low
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