Datasheet
TPS659110, TPS659112, TPS659113, TPS659116
SWCS049L –JUNE 2010–REVISED MARCH 2014
www.ti.com
11 Appendix A: Functional Registers
The possible device reset domains are:
• Full reset: All digital logic of device is reset.
– Caused by POR (power on reset) when VCC7 < VBNPR and BB < VBNPR
• General reset: No impact on RTC, backup registers or interrupt status.
– Caused by PWON_LP_RST bit set high or
– DEV_OFF_RST bit set high or
– HDRST input set high
• Turnoff OFF: Power reinitialization in off/backup mode.
In following register description, reset domain for each register is defined at the register table heading.
Note: DCDCCTRL_REG and DEVCTRL2_REG have bits in two reset domains.
Note 2:Comment “Default value: See boot configuration” indicates that bit default value is set in boot
configuration and not by register Reset value .”
64 Submit Documentation Feedback Copyright © 2010–2014, Texas Instruments Incorporated
Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659116