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ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - power management - special purpose 23.6 mA BGA 98 MicroStar Junior
51525354555657585960
SWCS049-022
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6
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5
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4
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3
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2
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1
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0
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7
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6
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3
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2
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7
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6
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5
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4
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3
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2
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1
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0
A
C
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O
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SDA
SCL
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6
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5
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4
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3
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2
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1
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0
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7
SWCS049-021
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6
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5
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4
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3
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2
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1
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7
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6
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5
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4
D
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3
D
A
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2
D
A
T
1
D
A
T
0
A
C
K
S
T
O
P
S
T
A
R
T
SDA
SCL
D
A
D
6
D
A
D
5
D
A
D
4
D
A
D
3
D
A
D
2
D
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1
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0
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7
SWCS049-020
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6
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5
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4
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3
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2
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1
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0
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DAD: Device address
RAD: Register address
DAT: Data
R
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7
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6
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5
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4
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3
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1
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0
A
C
K
D
A
T
7
D
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6
D
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5
D
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T
4
D
A
T
3
D
A
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2
D
A
T
1
D
A
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0
A
C
K
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O
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SDA
SCL
Slave drives SDA
Master drives SDA
S
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T
TPS659110, TPS659112, TPS659113, TPS659116
www.ti.com
SWCS049L –JUNE 2010–REVISED MARCH 2014
I
2
C Interface (continued)
• A third byte, including again the device address (7 MSBs) and the read command (LSB)
The device replies by sending
• A fourth byte, representing the content of the internal register (see Figure 19)
Figure 18. I
2
C Write Access Single Byte
Figure 19. I
2
C Read Access Single Byte
8.10.1.2 Multiple Byte Access To Several Adjacent Registers
A write access is initiated by:
• A first byte, including the address of the device (7 MSBs) and a write command (LSB)
• A second byte, providing the base address (8 bits) of the internal registers
The following N bytes represent the data to be written in the internal register starting at the base address and
incremented by one at each data byte (see Figure 20).
A read access is initiated by:
• A first byte, including the address of the device (7 MSBs) and a write command (LSB)
• A second byte, providing the base address (8 bits) of the internal register
• A thirrd byte, including again the device address (7 MSBs) and the read command (LSB)
The device replies by sending:
• A fourth byte, representing the content of the internal registers, starting at the base address and next
consecutive ones (see Figure 21).
Figure 20. I
2
C Write Access Multiple Bytes
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