Datasheet

TPS659110, TPS659112, TPS659113, TPS659116
SWCS049L –JUNE 2010–REVISED MARCH 2014 www.ti.com
8 Detailed Description
8.1 Power Reference
The bandgap voltage reference is filtered by using an external capacitor connected across the VREF output and
the analog ground REFGND (see Recommended Operating Conditions). The VREF voltage is distributed and
buffered inside the device.
8.2 Power Resources
The power resources provided by the TPS65911 device include inductor based switched mode power supplies
(SMPSs) and linear low-dropout voltage regulators (LDOs). These supply resources provide the required power
to the external processor cores and external components, and to modules embedded in the TPS65911 device.
Two of the integrated SMPSs and the external FET SMPS have voltage scaling capability. These SMPSs will
provide independent core voltage domains to the host processor. When changing the output voltage, VDD1 and
VDD2 reach the new value through successive steps of 2.5 to 12.5 mV. The size of the voltage step is selected
by the TSTEP bit. VDDCtrl has a target slew rate of 100 mV/20 µ s. New output values are reached in successive
smaller steps of N × LSB, LSB = 12.5 mV, N = 1 to 4. A suitable combination of steps is calculated internally
based on current and new target value for output voltage.
The VIO SMPS provides supply voltage for the host processor I/Os.
Table 10 lists the power sources provided by the TPS65911 device.
Table 10. Power Sources
RESOURCE TYPE VOLTAGES POWER
1.5 V 1300 mA
VIO SMPS 1.8 V 1200 mA
2.2 / 3.3 V 1100 mA
0.6 to 2.2 V 1500 mA
3.2 V 1200 mA
VDD1 SMPS
1.2 / 1.35 / 1.5 V (V
INmin
= 3 V) 2000 mA
0.6 ... 1.5 V in 12.5-mV steps
Programmable multiplication factor: x2, x3. Maximum output 3.3 V
0.6 to 1.5 V 1500 mA
2.2 / 3.2 V 1200 mA
VDD2 SMPS
0.6 ... 1.5 V in 12.5-mV steps
Programmable multiplication factor: x2, x3. Maximum output 3.3 V
External component
VDDCtrl SMPS 0.6 … 1.4 V in 12.5-mV steps
dependent
LDO1 LDO 1.0–3.3 V, 0.05-V step 320 mA
LDO2 LDO 1.0–3.3 V, 0.05-V step 320 mA
LDO3 LDO 1.0–3.3 V, 0.1-V step 200 mA
LDO4 LDO 1.0–3.3 V, 0.05-V step 50 mA
LDO5 LDO 1.0–3.3 V, 0.1-V step 300 mA
LDO6 LDO 1.0–3.3 V, 0.1-V step 300 mA
LDO7 LDO 1.0–3.3 V, 0.1-V step 300 mA
LDO8 LDO 1.0–3.3 V, 0.1-V step 300 mA
8.3 Embedded Power Controller
The embedded power controller (EPC) manages the state of the device and controls the power-up sequence.
8.3.1 STATE-MACHINE
The EPC supports the following states:
• NO SUPPLY: The main battery supply voltage is not high enough to power the VRTC regulator. A global
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