Datasheet

SWCS049-010
EN2
VDD2/VFB2
VDD1/VFB1
1.2 V
EN1
NRESPWRON
Low-power mode
PFM (pulse skipping) mode
Switch-on sequence
Switch-off sequence
Device on
PWM mode
SW1
t
dOEN
0 V
t
dVDDEN
t
dEN
3.3 V
t
dVDDEN
t
dSOFF2
t
dEN
t
dEN
SWCS046-009
EN1
LDO1
1.2 V
LDO4
1.8 V
EN2
NRESPWRON
t
dVEN
t
dEN
Switch-on sequence Switch-off sequence
Device on
t
dEN
t
dEN
t
dSOFF2
t
dEN
Low-power mode
TPS659110, TPS659112, TPS659113, TPS659116
SWCS049L –JUNE 2010–REVISED MARCH 2014 www.ti.com
7.4 Power Supplies State Control Through EN1 and EN2 Signals
NOTE: Register setting: LDO1_EN1 = 1, LDO4_EN2 = 1, and LDO4_KEEPON = 1.
Figure 9. LDO Type Supplies State Control Through EN1 and EN2
NOTE: Register setting: VDD2_EN2 = 1, VDD1_EN1 = 1, VDD1_KEEPON = 1, VDD1_PSKIP = 0, and SEL[6:0] = hex00 in
VDD2_SR_REG.
Figure 10. VDD1 and VDD2 Supplies State Control Through EN1 and EN2
Table 8. Supplies State Control Through EN1 and EN2 Timing Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
dEN
: NRESPWRON to to supply state change delay,
0 ms
EN1 or EN2 driven
t
dOEN
: EN1 or EN2 edge to supply state change
1 × t
CK32k
= 31 µs
delay
t
dVDDEN
: EN1 or EN2 edge to VDD1 or VDD2 DCDC
3 × t
CK32k
= 63 µs
turn on delay
42 Submit Documentation Feedback Copyright © 2010–2014, Texas Instruments Incorporated
Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659116