Datasheet

SWCS049-008
VCC7
VIO
INT1
1.8 V
NRESPWRON
Switch On sequence
Interrupt acknowledge
PWRHOLD
VMBHI_IT=1
CLK32KOUT
VMBCH threshold
VMBHI threshold
VRTC
1.8 V
VMBDCH2 threshold
VMBLO threshold
VBNPR threshold
Switch-off
sequence
VBACKUP > VBNPR
t
dbVMBLO
t
dbVMBDCH
t
d32KON
t
dbVMBHI
t
dSONT
t
dONPWHOLD
TPS659110, TPS659112, TPS659113, TPS659116
www.ti.com SWCS049L –JUNE 2010–REVISED MARCH 2014
7.3 Device Turn-On/Turn-Off with Rising/Falling Input Voltage
NOTE: To allow power-up from first supply insertion as shown here, VMBHI_IT_MSK is set to 0.
NOTE: Power-up to active state is enabled when VMBHI interrupt is not masked (VMBHI_IT_MSK in boot configuration).
NOTE: DEV_ON or AUTODEV_ON control bits can be used instead of PWRHOLD signal to maintain supplies on after
switch-on sequence
Figure 8. Device Turn-On/Off with Rising/Falling Input Voltage
Table 7. Device Turn-On Voltage with Rising Input Voltage, Timing Characteristics
PARAMETER TEST MIN TYP MAX UNIT
CONDITIONS
RC oscillator 0.1
t
d32KON
: 32-kHz oscillator
Quartz oscillator 200 ms
turn-on time
bypass clock 0.1
t
dbVMBHI
: VMBHI rising-
3 × t
CK32k
= 94 4 × t
CK32k
= 125 µs
edge debouncing delay
t
dOINT1
: INT1 Power On
pulse duration after
1 s
VMBHI high level
(debounced) event
t
dONPWHOLD
: delay to set
high PWRHOLD signal or
DEV_ON control bit after
t
dOINT1
– t
DSONT
= 970 ms
NRESPWRON released in
order to keep on the
supplies
t
dbVMBDCH
: Main Battery
voltage = VMBDCH
3 × t
CK32k
= 94 4 × t
CK32k
= 125 s
threshold to INT1 falling-
edge delay
t
dbVMBLO
: Main Battery
voltage = VMBLO
threshold to 3 × t
CK32k
= 94 4 × t
CK32k
= 125 s
NRESPWRON falling-
edge delay
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