Datasheet

PWRON
VIO
INT1
NRESPWRON
PWRHOLD
PWRON_LP_IT=1
PWRON_IT=1
Switch-off
sequence
t
dPWRONLPTO
t
dPWRONLP
t
dbPWRONF
SWCS049-006
PWRON_IT=1
PWRON
VIO
INT1
1.8 V
NRESPWRON
Interrupt acknowledge
PWRHOLD
PWRON_IT=1
CLK32KOUT
Interrupt acknowledge
Switch-off
sequence
t
t
dbPWRONF
t
dSONT
t
dbPWRONF
t
dONPWHOLD
Switch On sequence
SWCS049-005
PWRON_IT=1
dbPWRHOLDF
Internal pulse t
dOINT1
TPS659110, TPS659112, TPS659113, TPS659116
SWCS049L –JUNE 2010–REVISED MARCH 2014 www.ti.com
Device State Control Through PWRON Signal (continued)
Note::
1. DEV_ON or AUTODEV_ON control bits can be used instead of PWRHOLD signal to maintain supplies on after
switch-on sequence.
2. Internal POWER ON enable condition pulse TdOINT1 keeps device active until PWRHOLD acknowledge.
3. Switch-off from PWRHOLD removal
Figure 5. Device State Control Through PWRON Signal
Figure 6. PWRON Long-Press Turn-Off
Table 5 lists the power control timing characteristics.
Table 5. Power Control Timing Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
dbPWRONF
: PWRON falling-edge debouncing delay 100 ms
t
dbPWRONR
: PWRON rising-edge debouncing delay 3 × t
CK32k
= 94 µs
t
dbPWRHOLD
: PWRHOLD rising-edge debouncing
2 × t
CK32k
= 63 µs
delay
t
dOINT1
: INT1 (internal) Power-on pulse duration after
1 s
PWRON low-level (debounced) event
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