Datasheet

TPS659110, TPS659112, TPS659113, TPS659116
SWCS049L –JUNE 2010–REVISED MARCH 2014 www.ti.com
Bits Field Name Description Type Reset
0 GPIO_SET Value set on the GPIO output when configured in output mode RW 0
GPIO assigned to power-up sequence, this bit will be in TURNOFF reset
Table 88. GPIO7_REG
Address Offset 0x67
Physical Address Instance (RESET DOMAIN: GENERAL
RESET)
Description GPIO7 configuration register
Type RW
7 6 5 4 3 2 1 0
GPIO_SLEEP Reserved GPIO_DEB GPIO_PDEN GPIO_CFG GPIO_STS GPIO_SET
Bits Field Name Description Type Reset
7 GPIO_SLEEP 1: as GPO, force low RW 0
0: no impact, keep as in active mode
6:5 Reserved RO 0x0
R returns
0s
4 GPIO_DEB GPIO input debouncing time configuration: RW 0
When 0, the debouncing is 91.5 µs using a 30.5 µs clock rate
When 1, the debouncing is 150 ms using a 50 ms clock rate
3 GPIO_PDEN GPIO pad pulldown control: RW 1
1: Pulldown is enabled
0: Pulldown is disabled
GPIO assigned to power-up sequence, this bit will be set to 0 by a
TURNOFF reset
2 GPIO_CFG Configuration of the GPIO pad direction: RW 0
When 0, the pad is configured as an input
When 1, the pad is configured as an output
(Default value: See boot configuration)
GPIO assigned to power-up sequence, this bit will be set to 1 by a
TURNOFF reset
1 GPIO_STS Status of the GPIO pad RO 1
0 GPIO_SET Value set on the GPIO output when configured in output mode RW 0
GPIO assigned to power-up sequence, this bit will be in TURNOFF reset
Table 89. GPIO8_REG
Address Offset 0x68
Physical Address Instance (RESET DOMAIN: GENERAL
RESET)
Description GPIO8 configuration register
Type RW
7 6 5 4 3 2 1 0
Reserved GPIO_SEL GPIO_DEB GPIO_PDEN GPIO_CFG GPIO_STS GPIO_SET
Bits Field Name Description Type Reset
7:6 Reserved RO 0x0
R returns
0s
5 GPIO_SEL Select signal to be available at GPIO when configured as output: RW 0
0: GPIO_SET
1: PWM out
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