Datasheet

TPS65910 , TPS65910A , TPS65910A3 , TPS659101
TPS659102 , TPS659103 , TPS659104 , TPS659105
TPS659106, TPS659107, TPS659108, TPS659109
www.ti.com SWCS046U –MARCH 2010–REVISED JUNE 2014
Table 5-2 lists the 00 Boot mode timing characteristics.
Table 5-2. Boot Mode: BOOT1 = 0, BOOT0 = 0 Timing Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
dSON1
PWRHOLD rising edge to VIO, VAUX1 enable delay 66 × t
CK32k
= 2060 µs
t
dSON2
VIO to VDD2 enable delay 64 × t
CK32k
= 2000 µs
t
dSON3
VDD2 to VDD1 enable delay 64 × t
CK32k
= 2000 µs
t
dSON4
VDD1 to VPLL enable delay 64 × t
CK32k
= 2000 µs
t
dSON5
VPLL to VDAC,VAUX2 enable delay 64 × t
CK32k
= 2000 µs
t
dSON6
VDAC to VMMC enable delay 64 × t
CK32k
= 2000 µs
VMMC to CLK32KOUT rising edge delay 64 × t
CK32k
= 2000 µs
t
dSON8
CLK32KOUT to NRESPWRON rising edge delay 64 × t
CK32k
= 2000 µs
t
dSONT
Total switch-on delay 16 ms
PWRHOLD falling edge to NRESPWRON falling edge
t
dSOFF1
2 × t
CK32k
= 62.5 µs
delay
t
dSOFF1B
NRESPWRON falling edge to CLK32KOUT low delay 3 × t
CK32k
= 92 µs
PWRHOLD falling edge to supplies and reference
t
dSOFF2
5 × t
CK32k
= 154 µs
disable delay
Registers default setting: CK32K_CTRL = 1 (32-kHz RC oscillator is used), RTC_PWDN = 1 (RTC domain off),
IT_POL = 0 (INt2 interrupt flag active low), VMBHI_IT_MSK = 0 (automatic switch-on on Battery plug),
VMBCH_SEL = 11.
Copyright © 2010–2014, Texas Instruments Incorporated Specifications 37
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