Datasheet

TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103
TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109
SWCS046T –MARCH 2010–REVISED SEPTEMBER 2013 www.ti.com
Bits Field Name Description Type Reset
7 VDAC_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1/2 RW 0
is low
6 VPLL_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1/2 RW 0
is low
5 VAUX33_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1/2 RW 0
is low
4 VAUX2_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1/2 RW 0
is low
3 VAUX1_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1/2 RW 0
is low
2 VDIG2_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1/2 RW 0
is low
1 VDIG1_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1/2 RW 0
is low
0 VMMC_KEEPON Setting supply state during device SLEEP state or when SCLSR_EN1/2 RW 0
is low
Table 65. SLEEP_KEEP_RES_ON_REG
Address Offset 0x42
Physical Address Instance
Description Configuration Register keeping, during the SLEEP state of the device (but then supply state can be
overwritten programming ST[1:0]):
- the full load capability of LDO regulator (ACTIVE mode),
- The PWM mode of DCDC converter
- 32KHz clock output
- Register access though I2C interface (keeping the internal high speed clock on)
- Die Thermal monitoring on
Control bit value has no effect if the resource is off.
Type RW
7 6 5 4 3 2 1 0
VIO_KEEPON
VDD3_KEEPON VDD2_KEEPON VDD1_KEEPON
VRTC_KEEPON
I2CHS_KEEPON
THERM_KEEPON
CLKOUT32K_KEEPON
Bits Field Name Description Type Reset
7 THERM_KEEPON When 1, thermal monitoring is maintained during device SLEEP state. RW 0
When 0, thermal monitoring is turned off during device SLEEP state.
6 CLKOUT32K_KEEPO When 1, CLK32KOUT output is maintained during device SLEEP state. RW 0
N When 0, CLK32KOUT output is set low during device SLEEP state.
5 VRTC_KEEPON When 1, LDO regulator full load capability (ACTIVE mode) is maintained RW 0
during device SLEEP state.
When 0, the LDO regulator is set or stays in low power mode during
device SLEEP state.
4 I2CHS_KEEPON When 1, high speed internal clock is maintained during device SLEEP RW 0
state.
When 0, high speed internal clock is turned off during device SLEEP
state.
3 VDD3_KEEPON When 1, VDD3 SMPS high power mode is maintained during device RW 0
SLEEP state. No effect if VDD3 working mode is low power.
When 0, VDD3 SMPS low power mode is set during device SLEEP
state.
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TPS659105 TPS659106 TPS659107 TPS659108 TPS659109