Datasheet
OUT
SM2
RESPWRON
INT
RESET DELAY
PROGRAMMEDBY EXTERNAL CAPACITOR
CONNECTED TOPIN TRSTPWON
Power Applied
SYS_IN
RTC_OUT
LDO2
LDO5
LDO3
V
LOW_SYS
SEQUENCING
RESET NORMAL
NOPOWER
LDO1
I CRegistersLoadedFrom
E PROM
2
2
ENABLE
HI-Z
AC,USB,ORBAT
V
UVLO
V
UVLO
HI-Z
HI-Z
t
DLY(D2)
t
DLY(D1)
LD04
SM1
TPS65820
SLVS663B – MAY 2006 – REVISED APRIL 2008 ..............................................................................................................................................................
www.ti.com
Figure 29. TPS65820 Supply Sequencing Timing
RESET – When the reset state starts the RESPWRON output is LO. The user can program the reset timer value
selecting the value of the external capacitor connected to pin TRSTPWON, as shown below:
T
(RESET)
= K
RESET
× C
TRSTPWON
; where K
RESET
is the reset timer constant (1 ms/nF typ)
The TPS65820 RESPWRON pin should be used to reset the external host. During the external host reset
( RESPWRON = LO) the I
2
C SDA and SCL pins are not used to access TPS65820 internal registers. If a
non-standard configuration is used to reset the system the SDA and SCL lines should not be used to
communicate with the TPS65820 until RESPWRON = HI. The TPS65820 I
2
C engine is kept in reset as long as
RESPWRON = LO, avoiding false detection of start/stop conditions when the SDA and SCL pullup resistors are
initially powered.
The power good comparators are masked during the reset mode. The reset mode ends when the reset timer
expires, and the TPS65820 goes into the power good check mode.
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